Semiconductor device having interconnected external electrode pads and wire bonding pads

A semiconductor device, comprising:

• a substrate having a first surface, and a second surface provided on the opposite side of the first surface;
• external electrode pads formed over the first surface and arranged in a row, each of said external electrode pads being entirely disposed in a first area that has a length that extends from each said external electrode pad to adjacent ones of said external electrode pads along the row, and that has a maximum width that is defined by an outermost peripheral portion of said external electrode pads;
• a first wire bonding pad group formed over the second surface and placed substantially in parallel with the outer periphery of said substrate and being respectively connected to said external electrode pads via through holes defined in said substrate;
• a second wire bonding pad group placed inside said first wire bonding pad group;
• and
• a semiconductor chip mounted on the second surface of said substrate and provided, on the surface thereof, with electrode pads electrically connected to said first or second wire bonding pad group;
• wherein said semiconductor chip is placed inside said second wire bonding pad group and the electrode pads of said semiconductor chip are connected to said second wire bonding pad group;
• wherein said second wire bonding pad group is disposed only in a second area which is only directly over, and not offset relative to, the first area;
• and
• wherein the through holes are not formed in the second area in which said second wire bonding pad group is placed.

A semiconductor device, comprising:

• a substrate having a first surface and a second surface provided on the opposite side of the first surface;
• a semiconductor chip mounted on the second surface and having a plurality of electrode pads provided on the surface thereof;
• a plurality of wire bonding pads formed on the second surface;
• wires for electrically connecting the electrode pads of said semiconductor chip and said plurality of wire bonding pads;
• and
• a plurality of external electrode pads arranged in a row and formed over the first surface and electrically connected to said wire bonding pads respectively, each of said external electrode pads being entirely disposed in a first area that has a length that extends from each said external electrode pad to adjacent ones of said external electrode pads along the row, and that has a maximum width that is defined by an outermost peripheral portion of said external electrode pads,
• wherein said wire bonding pads are disposed only in a second area which is only directly over, and not offset relative to, the first area,
• wherein said wires are respectively connected to said wire bonding pads on the second surface corresponding to the first area;
• and
• wherein said wire bonding pads and said external electrode pads are respectively connected to one another via through holes defined in said substrate, the through holes not being formed in the second area in which said wire bonding pads are disposed.

A semiconductor device, comprising:

• a substrate which has a first surface and a second surface on an opposite side of the first surface;
• a plurality of external electrode pads arranged in a row and being formed on the first surface of the substrate, wherein said external electrode pads are aligned in parallel with the side of the substrate, each of said external electrode pads being entirely disposed in a first area that has a length that extends from each said external electrode pad to adjacent ones of said external electrode pads along the row, and that has a maximum width that is defined by an outermost peripheral portion of said external electrode pads;
• a plurality of wire bonding pads formed on the second surface of the substrate, said wire bonding pads being disposed only in a second area which is only directly over, and not offset relative to, the first area;
• a semiconductor chip mounted on the second surface of said substrate, said semiconductor-chip including a plurality of electrode pads which are electrically connected to the wire bonding pads;
• and,
• wherein a plurality of through holes are formed in the substrate at an area which is different from the second area of where the wire bonding pads are formed, and wherein said external electrode pads are electrically connected to the wire bonding pads via the through holes respectively.

A semiconductor device, comprising:

• a substrate which has a first surface and a second surface on an opposite side of the first surface;
• a plurality of external electrode pads arranged in a row and being formed on the first surface of the substrate, said external electrode pads including at least one group of external electrode pads which are arranged in a line, each of said external electrode pads of said at least one group being entirely disposed in a first area that has a length that extends from each said external electrode pad of said at least one group to adjacent ones of said external electrode pads of said at least one group along the line, and that has a maximum width that is defined by an outermost peripheral portion of said external electrode pads of said at least one group;
• a plurality of wire bonding pads formed on the second surface of the substrate, wherein said wire bonding pads are arranged on the second surface of said substrate only in a second area which is directly over, and not offset relative to, the first area;
• a semiconductor chip mounted on the second surface of said substrate, said semiconductor chip including a plurality of electrode pads which are electrically connected to the wire bonding pads;
• and
• wherein a plurality of through holes are formed in the substrate at an area which is different from the second area of where the wire bonding pads are formed, wherein said external electrode pads are electrically connected to the wire bonding pads via the through holes respectively.