US 6,479,847 B2 · Method for complementary oxide transistor fabrication

Abstract

A method of manufacturing an integrated circuit device includes forming a laminated structure having a first side and a second side, the first side includes a first type Mott channel layer and the second side includes a second type Mott channel layer. A first source region and a first drain region is formed on the first side, a second source region and a second drain region is formed on the second side, a first gate region is formed on the second side, opposite the first source region and the first drain region and a second gate region is formed on the first side, opposite the second source region and the second drain region. The first source, the first drain and the first gate comprise a first type field effect transistor and the second source, the second drain and the second gate comprise a second type field effect transistor.

Claims35

Dependent claims

A laminated complementary field effect structure comprising:

a P-type Mott channel layer;
and
N-type Mott channel layer adjacent said P-type Mott channel layer,
wherein said P-type Mott channel layer is complementary to said N-type Mott channel layer.

1 more element

A complementary field effect transistor structure comprising:

a laminated structure having a first side and a second side, said first side including a P-type Mott channel layer and said second side including a N-type Mott channel layer;
a first conductive layer on said first side having a first source region and a first drain region;
a second conductive layer on said second side having a second source region and a second drain region;
and
a gate conductor layer positioned between and insulated from said P-type Mott channel layer and said N-type Mott channel layer, said gate conductor layer having a first gate conductor region and a second gate conductor region,
wherein said first source region, said first drain region, said first gate conductor region and said P-type Mott channel layer comprise a P-type field effect transistor and said second source region, said second drain region, said second gate conductor region and said N-type Mott channel layer comprise a N-type field effect transistor.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application

09/306,509Filed 7 May 1999

Published

US 2002/0016030 A17 Feb 2002

Granted

12 Nov 2002

Term ends

Not estimatedThe source records don’t support an estimate.

Classification5 codes

H10N 99/03
Subject matter not provided for in other groups of this subclass: devices using Mott metal-insulator transition, e.g. field-effect transistor-like…
H10D 84/0165
The components including insulated gates, e.g. IGFETs: the components including complementary IGFETs, e.g. CMOS devices
H10D 84/038
Using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology: using silicon technology, e.g. SiGe
H10N
Electric solid-state devices not otherwise provided for

Method for complementary oxide transistor fabrication

Life of this patent

Method for complementary oxide transistor fabrication

Life of this patent

Abstract

Claims35