Single supply HFET with temperature compensation

An apparatus for providing low voltage temperature compensation in a single power supply hetero-junction field effect transistor comprising:

• a substrate including a stack of epitaxially grown compound semiconductor layers formed thereon, the stack including a first epitaxially grown compound semiconductor layer;
• a hetero-junction field effect transistor formed in at least a first portion of the stack, the first portion including the first epitaxially grown compound semiconductor layer, the hetero-junction field effect transistor having a channel with source and drain ohmic contacts and a gate contact operatively associated with the channel, the gate contact including a layer of contact metal, a first portion of seed metal, and a first portion of low resistance metal overlay positioned on the first portion of seed metal, the hetero-junction field effect transistor characterized as having a first turn-on voltage and a first negative temperature coefficient;
• a Schottky diode formed in at least a second portion of the stack, the second portion including the first epitaxially grown compound semiconductor layer, the Schottky diode being adjacent the hetero-junction field effect transistor and with two terminals externally accessible, the Schottky diode including a second portion of the seed metal positioned in contact with a layer of the stack and a second portion of the low resistance metal overlay positioned on the second portion of the seed metal, the Schottky diode having a second negative temperature coefficient and a second turn-on voltage that is less than the first turn-on voltage;
• and
• a gate circuit, coupled to hetero-junction field effect transistor, to compensate for changes of current loading in the gate circuit with changes in temperature, the gate circuit comprising the Schottky diode.