Method for designing a power supply decoupling circuit

A power supply decoupling circuit design method, for a printed circuit board wiring pattern for power wiring, which is extended from a power terminal of a semiconductor integrated circuit to a power supply layer or to a main power line, for a printed circuit board to which a direct current is supplied by one of said power supply layers and said main power line, and for designing a power decoupling capacitor that is located between said power terminal and either a ground layer or ground wiring for said printed circuit board, comprising the steps of:

• setting, in advance, an electric charge that flows from a direct current power source to said power terminal in response to the operation of said semiconductor integrated circuit, a direct current voltage for said direct current and a terminal voltage for said power terminal, a permissible voltage change in said power supply decoupling circuit, and a ratio for a current reduction in a high frequency element that is accompanied by the operation of said semiconductor integrated circuit;
• dividing said electric charge by said terminal voltage to obtain a load capacitance for said semiconductor integrated circuit;
• multiplying said direct current voltage by said load capacitance and dividing the product by said permissible voltage change;
• designing said power supply decoupling capacitor using the results of said division;
• multiplying said current reduction ratio by an impedance obtained from said power supply decoupling capacitor;
• and
• designing said printed circuit board wiring pattern using a power supply decoupling inductor obtained by applying the results of said multiplication.