Methods and arrangements for automatic synthesis of systems-on-chip
AssigneeInternational Business Machines Corporation
InventorsReinaldo A. Bergamashi/Rab, Subhrajit Bhattacharya, Jean-Marc R. Daveau, William R. Lee
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Abstract
Processes and arrangements for describing a system-on-chip at an abstract level. Contemplated is the creation of a “virtual design” and its automatic synthesis into a “real design that includes IP blocks from a library as well as all required interconnections and interface logic between them. Significant reductions in the complexity, time and cost associated with system-on-chip designs can be enjoyed as a result.
Claims13
A method of predetermining interconnections between at least two cores in a system-on-chip, said method comprising the steps of:
- establishing a virtual design for said system-on-chip, the virtual design including at least two virtual components, at least one virtual pin associated with each virtual component, and at least one virtual interconnection between at least one pair of virtual pins;
- and
- automatically transforming the virtual design into a real design, the real design including at least two real components, at least one real pin associated with each real component and at least one real interconnection between at least one pair of real pins;
- wherein said transforming step comprises determining the at least one real interconnection based on the compatibility between different real pins.
A system for predetermining interconnections between at least two cores in a system-on-chip, said system comprising:
- a virtual design system which establishes a virtual design for said system-on-chip, the virtual design including at least two virtual components, at least one virtual pin associated with each virtual component, and at least one virtual interconnection between at least one pair of virtual pins;
- and
- a transforming system which automatically transforms the virtual design into a real design, the real design including at least two real components, at least one real pin associated with each real component and at least one real interconnection between at least one pair of real pins;
- wherein said transforming system is adapted to determine the at least one real interconnection based on the compatibility between different real pins.
A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform method steps for predetermining interconnections between at least two cores in a system-on-chip, said method comprising:
- establishing a virtual design for said system-on-chip, the virtual design including at least two virtual components, at least one virtual pin associated with each virtual component, and at least one virtual interconnection between at least one pair of virtual pins;
- and
- automatically transforming the virtual design into a real design, the real design including at least two real components, at least one real pin associated with each real component and at least one real interconnection between at least one pair of real pins;
- wherein said transforming step comprises determining the at least one real interconnection based on the compatibility between different real pins.
Dependencies are inferred from the claim text.