Logic equivalence leveraged placement and routing of an IC design
OwnerDavid E. Wallaceinventor
Life of this patent
Estimating the term…
Abstract
At least one EDA tool is provided with first and second plurality of programming instructions. The first plurality of programming instructions are designed to determine equivalent logic in an IC design, and the second plurality of programming instructions are designed to place and route the IC design. The place and route operation includes performance of at least one place and route operation selected from a group of place and route operations consisting of choosing coupling assignments for nets and logically equivalent input pins of the IC design, and choosing coupling assignments for logically equivalent output pins and loads of the IC design.
Claims36
A machine implemented IC design method comprising:
- (a) determining equivalent logic in an IC design;
- and
- (b) performing place and route operations to place and route the IC design, including performing at least one place and route operation selected from a group of place and route operations consisting of choosing coupling assignments for nets and logically equivalent input pins of the IC design, and choosing coupling assignments for logically equivalent output pins to loads of the IC design.
An apparatus comprising:
- (a) a storage medium having stored therein-first plurality of programming instructions, with the first plurality of programming Instructions designed to place and route an IC design, including performance of at least one place and route operation selected from a group of place and route operations consisting of choosing coupling assignments for nets and logically equivalent input pins of the IC design, and choosing coupling assignments for logically equivalent output pins and loads of the IC design;
- and
- (b) a processor coupled to the storage medium to execute said first plurality of programming instructions.
An article of manufacture comprising:
- a recordable medium having recorded thereon machine executable first plurality of programming instructions, with the first plurality of programming instructions designed to place and route an IC design, including performance of at least one place and route operation selected from a group of place and route operations consisting of choosing coupling assignments for nets and logically equivalent input pins of the IC design, and choosing coupling assignments for logically equivalent output pins and loads of the IC design.
Dependencies are inferred from the claim text.