Method of calculating 3-dimensional fringe characteristics using specially formed extension shapes
AssigneeInternational Business Machines Corporation
InventorsL. William Dewey, III, Peter A. Habitz
Life of this patent
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Abstract
A structure and method for performing a capacitance extraction on an integrated circuit, includes determining a parallel-plate capacitance between devices on different levels within the integrated circuit, adding extension shapes around each of the devices, reducing an area of overlapping extension shapes, multiplying a remaining area of the extension shapes by a constant to produce a fringe capacitance; and summing the parallel-plate capacitance and the fringe capacitance.
Claims30
A method of determining a fringe capacitance of conductors in an integrated circuit comprising:
- building extension shapes around each of said conductors;
- and
- using an overlap of said extension shapes between said conductors to determine fringe capacitance.
A method of performing a capacitance extraction on an integrated circuit, said method comprising:
- determining a parallel-plate capacitance between devices on different levels within said integrated circuit;
- adding extension shapes around each of said devices;
- reducing an area of overlapping extension shapes;
- multiplying a remaining area of said extension shapes by a constant to produce a fringe capacitance;
- and
- summing said parallel-plate capacitance and said fringe capacitance.
A program storage device having executable instruction for determining a fringe capacitance of conductors in an integrated circuit comprising:
- building extension shapes around each of said conductors;
- and
- using an overlap of said extension shapes between said conductors to determine fringe capacitance.
Dependencies are inferred from the claim text.