Memory testing apparatus
AssigneeAdvantest Corporation
InventorKazuhiko Satoh
Life of this patent
Estimating the term…
Loading patent…
AssigneeAdvantest Corporation
InventorKazuhiko Satoh
Estimating the term…
A memory testing apparatus is provided, which can test in short time a memory having a block function like a flash memory. In addition to a failure analysis memory AFM capable of storing failures of all bits of a memory under test MUT, are provided a first bad block memory BBM and a second bad block memory CFM each having its storage capacity corresponding to the number of blocks that the memory under test has. The results of an initial test are stored in the first bad block memory. Utilizing the results of the initial test as mask data, bad blocks which have been determined to be failure in the initial test are masked by the mask data, respectively, so that a functional test for the bad blocks are omitted and the functional test for only pass blocks is performed. The results of the functional test are stored in the second bad block memory, and only the blocks having their bad block data stored in the second bad block memory are determined as to whether they are repairable or not.
A memory testing apparatus for testing a non-volatile memory that includes a plurality of memory blocks each including a plurality of memory cells in which stored data can be electrically erased in one or more of the blocks and rewritten, said memory testing apparatus comprising:
Dependencies are inferred from the claim text.