Application-specific integrated circuit for processing defined sequences of assembler instructions
AssigneeSiemens Aktiengesellschaft
InventorRudolf Osterholzer
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Abstract
The invention relates to an application-specific integrated circuit (ASIC) for processing defined sequences of assembler instructions (TASKs). To improve data throughput in applications with high memory access rates, the ASIC contains a TASK scheduler, which is implemented as hardware and which chronologically coordinates, in an appropriate manner, the processing of different TASKs on an ASIC internal processing means (EXU). Compared to conventional software control units for multitasking systems, this TASK scheduler which is implemented as hardware offers the advantage, among others, that the operating system is relieved of load, and an expensive memory architecture is not required.
Claims5
An application-specific integrated circuit comprising:
- a RISC processor that processes defined sequences of assembler instructions;
- a program and data memory that stores said sequences of assembler instructions;
- a processing unit that executes said sequences of assembler instructions;
- an internal data bus;
- an I/O interface arranged between said internal data bus and an external data memory;
- a sequence of assembler instructions scheduler configured as hardware that switches from one sequence of assembler instructions to another sequence of assembler instructions when execution of a first one of said sequence of assembler instructions has been interrupted, wherein each sequence assembler instructions, is assigned its own sequence of assembler instructions controller that determines a current state of said assigned sequence of assembler instructions and outputs corresponding state information, and said sequence of assembler instructions scheduler is configured such that it allocates said sequence of assembler instructions to said processing unit according to said determined current state.
Dependencies are inferred from the claim text.