Method and system for reading a memory by applying control signals thereto
AssigneeSTMelectronics S.r.l.
InventorsLuigi Pascucci, Marco Fontana
Life of this patent
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Abstract
A method for reading a memory by applying control signals. The control signals include a memory enable signal, a visibility signal, and a read signal. By applying the control signals to the memory, the memory is selectively configured into any of a plurality of cycles associated with reading the memory. The different cycles include: random read, pipeline-type random read, sequential read and suspend and wait cycles. Depending upon the cycle configuration of the memory, data is selectively emitted from the memory that coincides with the externally generated address.
Claims32
A method for reading a memory comprising the steps of:
- receiving a memory enable signal;
- receiving a visibility signal indicative of the allowability of said memory to utilize address signals generated externally to said memory, said address signals pointing to addresses within said memory;
- receiving a read signal to perform a read operation by said memory;
- configuring said memory into one of a plurality of cycles associated with reading data from said memory based upon the received memory enable signal, the visibility signal and the read signal, wherein an internal address of said memory is assigned an address value based upon the configured cycle;
- and
- selectively emitting said data from at least one memory location in said memory identified by said internal address.
A method for reading a memory comprising the steps of
- applying a memory enable signal to enable said memory to read at least one datum therefrom,
- applying a visibility signal and an external address to said memory, said visibility signal indicative of allowability of said memory to utilize the external address, said external address pointing to an address within said memory;
- applying a read signal to said memory to perform a read operation by said memory;
- generating an internal address within said memory based upon said visibility signal and said external address;
- and
- selectively providing said at least one datum from a memory location in said memory identified by said internal address based upon a state of said read signal.
A memory for storing data, said memory comprising:
- an array of memory cells;
- and
- control circuitry for receiving at least one control signal, selecting an address from one of an externally generated address and an internally generated address based upon said at least one control signal, and providing datum from at least one memory location within said array of memory cells identified by said selected address.
Dependencies are inferred from the claim text.