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US 6,477,102 B1Granted
Redundant programmable circuit and semiconductor memory device having the same
AssigneeNEC Corporation
InventorYuuji Matsui
Life of this patent
Estimating the term…
Abstract
In fuse blocks included in each of programmable circuits, an operational current of a fuse section is controlled by a current controller. In the fuse section, a diode-connected N-channel type MOS transistor is connected to an output line. In the fuse section, a diode-connected P-channel type MOS transistor is connected to an output line. A current flowing to and through the output lines is controlled by a P-channel type MOS transistor and an N-channel type MOS transistor included in the current controller.
Claims15
A redundant programmable circuit comprising:
- a control signal generation circuit which has a fuse and generates a control signal corresponding to whether the fuse is disconnected;
- a first transfer gate which receives an address signal and outputs an inverted address signal in accordance with the control signal when the fuse is disconnected;
- and
- a second transfer gate which receives an address signal and outputs a non-inverted address signal in accordance with the control signal when the fuse is connected;
- and
- a current controller which is connected to said control signal generation circuit, and controls an operational current to a given value, and wherein said control signal generation circuit includes:
- a first transistor which is connected between said fuse and said current controller;
- and
- second and third transistors both of which are connected to said current controller.
6 more elements
A redundant programmable circuit comprising:
- a plurality of signal output circuits which are connected in parallel between and to a single pair of connection lines, and each of which receives a binary signal corresponding to a plurality of bits sent from an external device, and also each of which outputs an inverted or non-inverted binary signal;
- a coincidence detection circuit which generates a detection signal representing that the binary signals respectively output by said plurality of signal output circuits are at a predetermined signal level;
- and
- a current controller which controls an amount of current flowing to and through the pair of connection lines to a given value for the continuing operation of said plurality of signal output circuits.
1 more element
A redundant programmable circuit comprising:
- a plurality of signal output circuits, which are connected in parallel between and to a single pair of connection lines, and each of which receives a binary signal corresponding to a plurality of bits sent from an external device, and also each of which outputs a binary signal in an inverted or non-inverted form;
- a coincidence detection circuit which generates a detection signal representing that the binary signal output by each of said plurality of signal output circuits is at a given signal level;
- and
- a current controller which is connected to the pair of connection lines and which controls an amount of current flowing to said plurality of signal output circuits to a given value for the continuing operation of said plurality of signal output circuits.
1 more element
A redundant programmable circuit comprising:
- a plurality of signal output means for receiving a binary signal corresponding to a plurality of bits sent from an external device, and for outputting a binary signal in an inverted or non-inverted form;
- means for generating a detection signal representing that the binary signal output by said plurality of signal output means is at a given signal level;
- a single pair of parallel connection means for connecting said plurality of signal output means;
- current controlling means for controlling an amount of current flowing through said plurality of signal output means to a given value for the continuing operation of said plurality of signal output means,
- said single pair of parallel connection means connecting said plurality of signal output means to said current controlling means, said plurality of signal output means being connected in parallel between and to said single pair of parallel connection means.
2 more elements
A semiconductor memory device comprising:
- a memory cell array;
- a redundant memory cell array;
- a first driving circuit, which receives an address signal, for accessing a memory cell included in said memory cell array;
- a redundant programmable circuit which receives an address signal and which determines whether the received address signal is one for requesting access to a defective memory cell;
- and
- a second driving circuit for accessing a memory cell included in said redundant memory cell array, when said redundant programmable circuit detects a request for accessing a defective memory cell, and
- wherein said redundant programmable circuit receives a binary signal forming an address signal corresponding to a plurality of bits and includes:
- a plurality of signal output circuits each of which outputs a binary signal in an inverted or non-inverted form,
- a coincidence detection circuit which generates a detection signal representing that the binary signal output by each of the plurality of signal output circuits is at a given signal level, and
- a current controller which controls an amount of current flowing through the plurality of signal output circuits to a given value for the continuing operation of the plurality of signal output circuits,
- the current flowing through the plurality of signal output circuits also flowing through a single pair of connection lines connecting the current controller and the plurality of signal output circuits, the plurality of signal output circuits being connected in parallel between and to the single pair of connection lines.
8 more elements
Dependencies are inferred from the claim text.