Level shifter of nonvolatile semiconductor memory
AssigneeKabushiki Kaisha Toshiba
InventorYoshinori Takano
Life of this patent
Estimating the term…
Abstract
A first level shifter outputs one of a first potential and a second potential lower than the first potential from an output terminal in accordance with the level of an input signal. A second level shifter outputs one of the first potential and a third potential lower than the second potential from an output terminal in accordance with the output potential from the first level shifter. A third level shifter outputs one of the first and second potentials from an output terminal in accordance with the level of the input signal. A first switching circuit selects the output voltage from the second level shifter when a high-speed operation is required such as in a read operation.
Claims22
A semiconductor device comprising:
- a first level shifter having an input terminal for receiving an input signal and an output terminal, said first level shifter outputting one of a first potential and a second potential lower than the first potential from said output terminal in accordance with the level of the input signal;
- a second level shifter having an input terminal connected to said output terminal of said first level shifter, said second level shifter outputting one of the first potential and a third potential lower than the second potential from an output terminal in accordance with the output potential from said first level shifter;
- a third level shifter having an input terminal for receiving said input signal and an output terminal, said third level shifter outputting one of said first and second potentials from said output terminal in accordance with the level of said input signal;
- and
- a first switching circuit connected to said output terminals of said second and third level shifters, said first switching circuit selecting one of the output potentials from said second and third level shifters in accordance with a control signal.
A semiconductor device comprising:
- a first level shifter having an input terminal for receiving an input signal and an output terminal, said first level shifter outputting one of a first potential and a second potential lower than the first potential from said output terminal in accordance with the level of the input signal;
- a second level shifter having an input terminal connected to said output terminal of said first level shifter, said second level shifter outputting one of the first potential and a third potential lower than the second potential from an output terminal in accordance with the output potential from said first level shifter;
- a third level shifter having an input terminal for receiving the input signal and an output terminal, said third level shifter outputting one of the second potential and a fourth potential lower than the first potential and higher than the second potential from said output terminal in accordance with the level of the input signal;
- and
- a first switching circuit connected to said output terminals of said second and third level shifters, said first switching circuit selecting one of the output potentials from said second and third level shifters in accordance with a control signal.
A semiconductor device comprising:
- a first level shifter having an input terminal for receiving an input signal and an output terminal, said first level shifter outputting one of a first potential and a second potential lower than the first potential from said output terminal in accordance with the level of the input signal;
- a second level shifter having an input terminal for receiving the input signal and an output terminal, said second level shifter outputting one of the second potential and a third potential lower than the first potential and higher than the second potential in accordance with the level of the input signal;
- and
- a first switching circuit connected to said output terminals of said first and second level shifters, said first switching circuit selecting one of the output potentials from said first and second level shifters in accordance with a control signal.
Dependencies are inferred from the claim text.