Luminance resolution enhancement circuit and display apparatus using same

A method of converting a digital image signal with (m+n)-bit input pixel values to an output image signal with m-bit pixel values, where m and n are positive integers, each input pixel value having an m-bit displayable component and an n-bit non-displayable component, comprising the steps of:

• generating spatial and temporal coordinates that identify a relative position of each said input pixel value within a spatial and temporal coordinate region;
• calculating, for each said input pixel value, an average value representing an average non-displayable component of the input pixel values in an averaging region including said input pixel value;
• generating a dither signal according to said spatial and temporal coordinates and said average value;
• and
• additively combining said dither signal with the displayable component of each said input pixel value, thereby generating said output image signal.

A luminance resolution enhancing apparatus converting a digital image signal with (m+n)-bit input pixel values to an output image signal with m-bit output pixel values, where m and n are positive integers, each input pixel value having an m-bit displayable component and an n-bit non-displayable component, said apparatus comprising:

• an input receiving said input pixel values;
• an address generator operatively connected to said input, said address generator generating spatial and temporal coordinates that identify a relative position of each said input pixel value within a spatial and temporal coordinate region;
• an averager operatively connected to said input, said averager calculating, for each said input pixel value, an average value representing an average non-displayable component of the input pixel values in an averaging region including said input pixel value;
• a dither generator operatively connected to said address generator and said averager, said dither generating a dither signal according to said spatial and temporal coordinates and said average value;
• and
• a processor operatively connected to said dither generator, said processor combining said dither signal with the displayable component of each said input pixel value, thereby generating said output image signal.