Multiplexing pixel circuits
AssigneeInternational Business Machines Corporation
InventorsFrank R. Libsch, Kai R. Schleupen, Robert L. Wisnieff
Life of this patent
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Abstract
An active matrix display in accordance with the present invention includes a plurality of pixels arranged in an array. At least two transistors are included for coupling to each pixel, and the transistors are positioned within the array for switching the pixels on and off according to data and gate signals. A plurality of control lines are coupled to the transistors of each pixel such that the control lines provide multiplexing for at least one of data signal multiplexing and gate signal multiplexing.
Claims42
An active matrix display comprising:
- a plurality of pixels arranged in an array;
- at least two transistors associated with each pixel, the transistors positioned within the array for switching the pixels on and off according to data and gate signals;
- and
- at least two scan lines coupled to one of the at least two transistors of each pixel such that the scan lines provide gate signal multiplexing, wherein the scan lines are coupled to the transistors by a low impedance path.
An active matrix display comprising:
- a plurality of pixels arranged in an array including rows and columns;
- at least two transistors associated with each pixel, the transistors positioned within the array for switching the pixels on and off;
- a plurality of data lines running substantially parallel to the columns;
- a plurality of scan lines running substantially parallel to the rows;
- and
- the data lines and scan lines being coupled to the transistors of the pixels such that the data lines provide data multiplexing for each pixel and at least two scan lines coupled to one of the at least two transistors provide gate multiplexing for each pixel, wherein the data lines and scan lines are coupled to the transistors by a low impedance path.
An active matrix display comprising:
- a plurality of pixels arranged in an array;
- at least two transistors associated with each pixel, the transistors positioned within the array for switching the pixels on and off according to data and gate signals, the transistors being disposed on a substrate and having the pixels formed over the transistors;
- and
- at least two scan lines coupled to one of the at least two transistors of each pixel such that the scan lines provide gate signal multiplexing, wherein the scan lines are coupled to the transistors by a low impedance path.
Dependencies are inferred from the claim text.