Analog to digital converter using magnetoresistive memory technology

Abstract

An analog to digital converter using a memory array of multi-state magnetoresistive memory elements in which a received analog signal is proportionally distributed among the memory elements to program the memory array. The memory array may be organized into column and row memory lines and may include analog splitter circuitry that proportionally distributes the analog signal among the column and row memory lines. The analog splitter circuitry may divide the analog signal into increasingly discrete signal levels along the column and row memory lines. The analog splitter circuitry may include multiple current devices, each configured to carry a proportionally increasing current level between consecutive column and row memory lines. Alternatively, the analog splitter circuitry includes substantially equivalent current devices that are grouped and proportionally distributed among the column and row memory lines to proportionally distribute the received analog signal. Read logic digitally combines programmed logic states of the memory elements of the memory array to achieve an output digital value. The read logic counts memory elements having a predetermined memory state. The read logic may use a binary or sequential search for counting memory elements. Signal processing logic may be provided that determines any change in state or threshold condition of the memory array.

Dependencies are inferred from the claim text.