Cascode amplifying circuit and folded cascode amplifying circuit
AssigneesNippon Precision Circuits Inc., Yasuhiro Sugimoto
InventorsSatoru Miyabe, Yasuhiro Sugimoto
Life of this patent
Estimating the term…
Loading patent…
AssigneesNippon Precision Circuits Inc., Yasuhiro Sugimoto
InventorsSatoru Miyabe, Yasuhiro Sugimoto
Estimating the term…
To provide a cascode amplifying circuit having large amplifying gain without narrowing an output operational range or deteriorating response performance of the circuit even with a constitution by a small number of elements is achieved by applying negative feedback from the source to the gate of an MOS transistor M2 provided with an output terminal at the drain via the source and the drain of an MOS transistor M3 of N-channel type, the source and the drain of an MOS transistor M4 of P-channel type and a current mirror constituted by MOS transistors M5 and M6 of N-channel type. By this constitution, operation of the MOS transistor M3 is not effected with influence of lowering of voltage of the source of the MOS transistor M2, a wide output operational range is provided and mirror effect with respect to gate/drain capacitance of the MOS transistor is restrained to thereby restrain a reduction in response speed.
A cascode amplifying circuit comprising:
Dependencies are inferred from the claim text.