High-speed, low-power sample and hold circuit
AssigneeMicrochip Technology Incorporated
InventorMichael J. Brunolli
Life of this patent
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Abstract
An improved sample and hold circuit for analog-to-digital conversion. The improvement incorporates an asymmetric drive high gain operational amplifier to rapidly slew the input voltage for maintaining a high sample rate. The asymmetric drive high gain operational amplifier allows increased current to be delivered in a uni-directional manner. The input nodes of the high gain operational amplifier are pre-charged to a predetermined reference voltage which further enhances the acquisition time. The asymmetric drive high gain amplifier may be switched off to conserve power consumption.
Claims19
A method, in a sample and hold circuit having a fast slew rate and low power consumption, said method comprising the steps of:
- turning on a first operational amplifier;
- precharging the first operational amplifier to a voltage reference;
- precharging a second operational amplifier to the voltage reference;
- sampling an input voltage;
- applying the sampled input voltage to an input of the first operational amplifier;
- applying an output of the first operational amplifier to an input of the second operational amplifier;
- and
- turning off the first operational amplifier, wherein an output of the second operational amplifier produces a comparison signal representative of the sampled input voltage.
A method, in a sample and hold circuit having a fast slew rate and low power consumption, said method comprising the steps of:
- providing a first operational amplifier having first and second inputs and a first output;
- providing a second operational amplifier having third and fourth inputs, and second and third outputs, wherein the third input is connected to the first output and the fourth input is connected to the second input;
- precharging the first, second, third and fourth inputs to a reference voltage;
- coupling an input voltage to an input sampling capacitor connected to the first input, wherein the input sampling capacitor retains a sample voltage value of the input voltage;
- coupling a ground reference to a ground sampling capacitor connected to the second input, wherein the ground sampling capacitor retains a sample ground value of the ground reference;
- and
- coupling the second output to the third input and the third output to the fourth input.
Dependencies are inferred from the claim text.