Defect screening using delta VDD

An apparatus for testing a series of functional blocks within an integrated circuit comprising:

• a tester for testing each of the functional blocks in the series to determine a minimum parameter value associated with each of the functional blocks,
• a calculator for calculating a minimum parameter delta value for each of the functional blocks in the series, where the minimum parameter delta value is the minimum parameter value associated with a given one of the functional blocks subtracted from the minimum parameter value for a functional block immediately following the given one of the functional blocks in the series,
• the tester further for testing each of the functional blocks in the series to determine a maximum parameter value associated with each of the functional blocks,
• the calculator further for calculating a maximum parameter delta value for each of the functional blocks in the series, where the maximum parameter delta value is the maximum parameter value associated with the given one of the functional blocks subtracted from the maximum parameter value for the functional block immediately following the given one of the functional blocks in the series,
• a comparator for comparing the minimum parameter delta value to a minimum parameter delta value tolerance limit,
• the comparator further for comparing the maximum parameter delta value to a maximum parameter delta value tolerance limit,
• a binner for selectively binning the integrated circuit based at least in part on whether the minimum parameter delta value for any of the functional blocks violates the minimum parameter delta value tolerance limit, and
• the binner further for selectively binning the integrated circuit based at least in part on whether the maximum parameter delta value for any of the functional blocks violates the maximum parameter delta value tolerance limit.

A program on a computer readable media, the program having logic elements for enabling a programmable computing device to test a series of functional blocks within an integrated circuit, the program comprising:

• a testing routine for testing each of the functional blocks in the series to determine a minimum parameter value associated with each of the functional blocks,
• a calculating routine for calculating a minimum parameter delta value for each of the functional blocks in the series, where the minimum parameter delta value is the minimum parameter value associated with the given one of the functional blocks subtracted from the minimum parameter value for a functional block immediately following the given one of the functional blocks in the series,
• the testing routine further for testing each of the functional blocks in the series to determine a maximum parameter value associated with each of the functional blocks,
• the calculating routine further for calculating a maximum parameter delta value for each of the functional blocks in the series, where the maximum parameter delta value is the maximum parameter value associated with the given one of the functional blocks subtracted from the maximum parameter value for a functional block immediately following the given one of the functional blocks in the series,
• a comparing routine for comparing the minimum parameter delta value to a minimum parameter delta value tolerance limit,
• the comparing routine further for comparing the maximum parameter delta value to a maximum parameter delta value tolerance limit,
• a binning routine for selectively binning the integrated circuit based at least in part on whether the minimum parameter delta value for any of the functional blocks violates the minimum parameter delta value tolerance limit, and
• the binning routine further for selectively binning the integrated circuit based at least in part on whether the maximum parameter delta value for any of the functional blocks violates the maximum parameter delta value tolerance limit.