Thin-film semiconductor apparatus, display apparatus using such semiconductor apparatus, and method of manufacturing such display apparatus

A thin-film semiconductor apparatus having a plurality of thin-film transistors integrated on an insulating substrate comprising:

• a lower-side wiring formed on said substrate;
• a gate electrode connected to said lower-side wiring;
• an insulating film formed on said lower-side wiring and said gate electrode;
• a semiconductor thin film formed on said insulating film as to form device areas of said thin-film transistors;
• an inter-layer film formed on said semiconductor thin-film;
• and
• an upper-side wiring formed on said inter-layer film and connected to said thin-film transistors via contact holes;
• wherein
• said lower-side wiring comprises a multi-layered structure in which at least a second wiring layer is superposed on a first wiring layer;
• said second wiring layer has such a width dimension being greater than that of said first wiring layer as to fully cover the said first wiring layer;
• and
• a dimension ranging from an end of said first wiring layer to an end of said second wiring layer projecting to external portion in the width direction is greater than thickness of said second wiring layer.

A display apparatus having a plurality of picture elements being arrayed via matrix formation and a plurality of thin-film transistors for driving said picture elements integrated on an insulating substrate comprising:

• a lower-side wiring formed on said substrate;
• a gate electrode to be set to the same potential with that of said lower-side wiring and patterned simultaneously with patterning of said lower-side wiring;
• an insulating film formed on said lower-side wiring and said gate electrode;
• a semiconductor thin film formed on said insulating film as to form a device area of the thin-film transistor;
• an inter-layer film formed on said semiconductor thin film;
• and
• an upper-side wiring formed on said inter-layer film and connected to the thin-film transistor via a contact hole;
• wherein
• said gate electrode has such a thickness being less than that of said lower-side wiring.

A display apparatus having a plurality of picture elements being arrayed via matrix formation and a plurality of thin-film transistors for driving said picture elements integrated on an insulating substrate comprising:

• a lower-side wiring formed on said substrate;
• a gate electrode connected to said lower-side wiring;
• an insulating film formed on said lower-side wiring and said gate electrode;
• a semiconductor thin film formed on said insulating film as to form a device area of the thin-film transistor;
• an inter-layer film formed on said semiconductor thin film;
• and
• an upper-side wiring formed on said inter-layer film and connected to the thin-film transistor via a contact hole;
• wherein
• said lower-side wiring comprises a multi-layered structure in which at least a second wiring layer is superposed on a first wiring layer;
• said second wiring layer has such a width dimension being greater than that of said first wiring layer as to fully cover the said first wiring layer;
• and
• a dimension ranging from an end of said first wiring layer to an end of said second wiring layer projecting to external portion in the width direction is greater than thickness of said second wiring layer.

A method of manufacturing a display apparatus having a plurality of picture elements being arrayed via matrix formation and a plurality of thin-film transistors for driving said picture elements integrated on an insulating substrate, said method comprising serial manufacturing steps of;

• a step of forming a lower-side wiring to be disposed on said substrate;
• a step of forming a gate electrode to be set to the same potential with that of said lower-side wiring and patterned simultaneously with patterning of said lower-side wiring;
• a step of forming an insulating film over said lower-side wiring and said gate electrode;
• a step of forming semiconductor thin film which is disposed on said insulating film as to make a device area of thin-film transistor;
• a step of forming an inter-layer film on said semiconductor thin film;
• and
• a step of forming an upper-side wiring which is disposed on said inter-layer film and connected to thin-film transistor via a contact hole;
• wherein
• a thickness of said gate electrode is set to be less than that of said lower-side wiring layer in said gate electrode forming step.

A method of manufacturing a display apparatus having a plurality of picture elements being arrayed via matrix formation and a plurality of thin-film transistors for driving said picture elements integrated on an insulating substrate;

• said method comprising serial manufacturing steps of:
• a step of forming a lower-side wiring on said substrate;
• a step of connecting a gate electrode connected to said lower-side wiring;
• a step of forming an insulating film on said lower-side wiring and said gate electrode;
• a step of forming a semiconductor thin film on said insulating film as to form a device area of the thin-film transistor;
• a step of forming an inter-layer film on said semiconductor thin film;
• and
• a step of forming an upper-side wiring on said interlayer film and connecting to the thin-film transistor via a contact hole;
• wherein
• said lower-side wiring is formed in a multi-layered structure in which at least a second wiring layer is superposed on a first wiring layer;
• width dimension of said second wiring layer is arranged to be greater than the width dimension of said first wiring layer as to fully cover said first wiring layer;
• and
• dimension ranging from an end of said first wiring layer to an end of said second wiring layer projecting to external portion in the width direction is arranged to be greater than thickness dimension of said second wiring layer.