Method for manufacturing semiconductor device having a multi-layer interconnection
AssigneeOki Electric Industry Co., Ltd.
InventorsHidetomo Nishimura, Makiko Nakamura
Life of this patent
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Abstract
A semiconductor device including a semiconductor substrate, and a plurality of first interconnects formed over the semiconductor substrate. A first insulating layer covers the plurality of first interconnects, and a second insulating layer is formed between the plurality of first interconnects. The second insulating layer has substantially the same height as the plurality of first interconnects. An intermediate insulating layer is formed over the second insulating layer.
Claims20
A method for manufacturing a semiconductor device, comprising:
- forming a plurality of interconnects of substantially same height over a silicon substrate;
- forming a first insulating layer over the plurality of interconnects, the first insulating layer covering top and side surfaces of the plurality of interconnects;
- forming a second insulating layer on the first insulating layer over the top surfaces and between the plurality of interconnects, the second insulating layer having substantially a same thickness as the plurality of interconnects;
- forming an adhesive layer over the second insulating layer;
- forming a support insulating layer over the second insulating layer,
- the adhesive layer and the support insulating layer being formed as substantially horizontal layers between the plurality of interconnects and as substantially non-horizontal layers over the top surfaces of the plurality of interconnects;
- polishing the second insulating layer, the adhesive layer and the support insulating layer that are formed over the top surfaces of the plurality of interconnects;
- and
- forming an intermediate insulating layer over the second insulating layer.
A method for manufacturing a semiconductor device, comprising:
- forming a plurality of interconnects over a silicon substrate;
- forming a first insulating layer over the plurality of interconnects, the first insulating layer covering top and side surfaces of the plurality of interconnects;
- forming a second insulating layer on the first insulating layer over the top surfaces and between the plurality of interconnects, so that upper sidewalls of the first insulating layer on the side surfaces of the plurality of interconnects are exposed;
- forming an adhesive layer over the second insulating layer and on the exposed upper sidewalls of the first insulating layer;
- forming a support insulating layer over the second insulating layer;
- polishing the second insulating layer, the adhesive layer and the support insulating layer that are formed over the top surfaces of the plurality of interconnects;
- and
- forming an intermediate insulating layer over the second insulating layer.
Dependencies are inferred from the claim text.