US 6,475,875 B1Granted

Shallow trench isolation elevation uniformity via insertion of a polysilicon etch layer

AssigneeChartered Semiconductor Manufacturing Ltd.

InventorsPang Chong Hau, Chen Feng, Alex See, Peter Hing

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Abstract

A process for forming insulator filled, shallow trench isolation (STI), regions in a semiconductor substrate, featuring a disposable polysilicon stop layer used to allow uniform insulator fill to be obtained, independent of shallow trench width, has been developed. The process features filling shallow trench shapes with a first high density plasma (HDP), deposited silicon oxide layer, followed by the deposition of the thin polysilicon stop layer, and a second HDP silicon oxide layer. After a planarizing chemical mechanical polishing procedure residual regions of the second HDP silicon oxide, still remaining in regions overlying the insulator filled shallow trench shapes, are selectively removed using the thin polysilicon layer as a stop layer. The polysilicon layer is then thermally oxidized. The thickness of the polysilicon layer can be varied such that the resultant polysilicon oxide layer serves to alleviate the possible oxide loss in the STI regions during subsequent clean processes.

Claims28

Dependent claims

A method of forming insulator filled, shallow trench isolation (STI), regions in a semiconductor substrate, comprising the steps of:

growing a first silicon dioxide layer on said semiconductor substrate;
depositing a silicon nitride layer;
forming shallow trench shapes in said silicon nitride layer, in said first silicon dioxide layer, and in a top portion of said semiconductor substrate;
growing a second silicon dioxide layer on surfaces of said semiconductor substrate exposed in said shallow trench shapes;
depositing a first silicon oxide layer, with a first portion of said first silicon oxide layer located on the top surface of said silicon nitride layer, and with a second portion of said first silicon oxide layer filling said shallow trench shapes;
depositing a thin stop layer;
depositing a second silicon oxide layer on said thin stop layer, removing first portions of said second silicon oxide layer, first portions of said thin stop layer, and said first portions of said first silicon oxide layer, from top surface of said silicon nitride layer, leaving second portions of said second silicon oxide layer, and second portions of said thin stop layer, on said second portions of said first silicon oxide layer, located in said shallow trench shapes;
selectively removing said second portions of said second silicon oxide layer from the top surface of said second portions of said thin stop layer;
performing a thermal oxidation procedure to convert said second portions of said thin stop layer to an oxidized stop layer;
selectively removing said silicon nitride layer;
and
removing said first silicon dioxide layer resulting in said insulator filled, STI regions located in said top portion of said semiconductor substrate.

9 more elements

A method of forming insulator filled, shallow trench isolation (STI), regions in a semiconductor substrate, featuring a disposable polysilicon stop layer, used to allow uniform insulator filling in shallow trenches to be realized, independent of the spacing between said shallow trenches and independent of shallow trench width, comprising the steps of:

growing a silicon dioxide pad layer on said semiconductor substrate;
depositing a silicon nitride layer;
forming shallow trench shapes, comprised with various widths, in said silicon nitride layer, in said pad silicon dioxide layer, and in a top portion of said semiconductor substrate;
growing a silicon dioxide liner layer on surfaces of said semiconductor substrate exposed in said shallow trench shapes;
depositing a first high density plasma (HDP), silicon oxide layer, with a first portion of said first HDP silicon oxide layer located on the top surface of said silicon nitride layer, and with a second portion of said first HDP silicon oxide layer filling said shallow trench shapes;
depositing said polysilicon stop layer;
depositing a second HDP silicon oxide layer on said polysilicon stop layer;
removing first portions of said second HDP silicon oxide layer, first portions of said polysilicon stop layer, and first portions of said first HDP silicon oxide layer, from top surface of said silicon nitride layer, leaving second portions of said second HDP silicon oxide layer, and second portions of said polysilicon stop layer, on said second portions of said first HDP silicon oxide layer, located in said shallow trench shapes;
selectively removing said second portions of said second HDP silicon oxide layer from the top surface of said second portions of said polysilicon stop layer;
performing a thermal oxidation procedure to convert said second portions of said
polysilicon stop layer to a polysilicon oxide layer;
selectively removing said silicon nitride layer;
and
removing said silicon dioxide pad layer resulting in said insulator filled, STI regions, located in said top portion of said semiconductor substrate.

11 more elements

Dependencies are inferred from the claim text.