Damascene NiSi metal gate high-k transistor

A method of implementing a high k gate dielectric layer in a semiconductor structure comprising the steps of:

• forming active regions with a channel therebetween on a main surface of a semiconductor substrate;
• forming high temperature silicide on the active regions;
• forming a temporary gate over the channel between dielectric structures;
• removing the temporary gate to form a recess with a bottom and sidewalls between the dielectric structures;
• depositing a high dielectric constant (high k) gate dielectric in the recess;
• depositing amorphous silicon over the dielectric structure and the high k gate dielectric in the recess;
• removing the amorphous silicon except for a portion in the recess;
• depositing a low temperature silicidation metal on the amorphous silicon wherein the low temperature silicidation metal is nickel;
• annealing to cause the low temperature silicidation metal and the portion of the amorphous silicon to interact to form a self-aligned low temperature metal silicide gate on the high k gate dielectric in the recess;
• and
• removing the low temperature silicidation metal remaining unreacted after the annealing.