Oxygen implantation for reduction of junction capacitance in MOS transistors

A method of manufacturing a silicon-based MOS-type transistor device having reduced source/drain junction-to-semiconductor substrate capacitance, which method comprises the sequential steps of:

• (a) providing a MOS transistor precursor structure comprising a silicon semiconductor wafer substrate of a first conductivity type and a layer stack formed on a portion of a surface of said wafer substrate, said layer stack comprising:
• i. a thin gate insulating layer comprising a silicon oxide layer about 25-50 Angstroms thick in contact with said wafer surface;
• and
• ii. a gate electrode layer comprising heavily-doped polysilicon formed on said gate insulating layer, said layer stack comprising a pair of opposing side surfaces and a top surface, with an insulate sidewall spacer comprising an oxide, nitride, or oxynitride of silicon formed on each of said opposing side surfaces;
• (b) selectively implanting dopant impurities of second conductivity type, opposite the first conductivity type, into portions of said substrate adjacent said sidewall spacers for forming spaced-apart source/drain regions in said substrate, the dosage and energy of the implanted dopant impurities being selected for providing source/drain junctions at a preselected ultimate depth below said substrate surface;
• (c) selectively implanting oxygen atoms and/or molecules into said substrate portions adjacent said sidewall spacers, the implanted oxygen atoms and/or molecules having a dosage and energy selected for providing a peak concentration of implanted oxygen atoms and/or molecules just below the ultimate depth of said source/drain junctions;
• (d) thermally treating the oxygen-implanted substrate at a temperature of about 1,000-1,050° C. for about 10-15 seconds for effecting reaction between said silicon substrate and the implanted oxygen atoms and/or molecules, thereby forming a silicon oxide barrier in said substrate completely surrounding and separating the implanted impurities from the substrate just below the ultimate depth of each of said source/drain junctions;
• and
• (e) forming electrically conductive refractory metal silicide ohmic contacts to said top surface of said gate electrode layer and to said source/drain junction regions by a silicide process.