Inclusion of global wires in capacitance extraction
AssigneeInternational Business Machines Corporation
InventorsL. William Dewey, III, Peter A. Habitz, Edward W. Seibert
Life of this patent
Estimating the term…
Abstract
A method and structure for performing capacitance extraction during the design of an integrated circuit includes inputting a specified wiring density and design requirements, determining a minimum spacing for wire segments based on the design requirements, calculating a transparency factor based on the wiring density, calculating a lateral capacitance assuming virtual wires are present in the integrated circuit, and calculating a vertical capacitance based on the transparency factor.
Claims21
A method of performing capacitance extraction during the design of an integrated circuit, said method comprising:
- inputting a specified wiring density and design requirements;
- determining a minimum spacing for wire segments based on said design requirements;
- calculating a transparency factor based on said wiring density;
- calculating a lateral capacitance assuming imaginary virtual wires are present in said integrated circuit;
- and
- calculating a vertical capacitance based on said transparency factor.
A method of performing capacitance extraction during the design of an integrated circuit, said method comprising:
- inputting a specified wiring density and design requirements;
- determining a minimum spacing for wire segments based on said design requirements;
- calculating a transparency factor based on said wiring density;
- calculating a lateral capacitance assuming virtual wires are present in said integrated circuit;
- and
- calculating a vertical capacitance based on said transparency factor;
- wherein said virtual wires are imaginary and are not included in a final design of said integrated circuit.
A method of performing capacitance extraction during the design of an integrated circuit, said method comprising:
- inputting a specified wiring density and design requirements;
- determining a minimum spacing for wire segments based on said design requirements;
- calculating a transparency factor based on said wiring density;
- calculating a lateral capacitance assuming virtual wires are present in said integrated circuit;
- and
- calculating a vertical capacitance based on said transparency factor;
- wherein said virtual wires are utilized exclusively for said capacitance extraction.
A method of performing capacitance extraction during the design of an integrated circuit, said method comprising:
- inputting a specified wiring density and design requirements;
- determining a minimum spacing for wire segments based on said design requirements;
- calculating a transparency factor based on said wiring density;
- calculating a lateral capacitance assuming virtual wires are present in said integrated circuit;
- and
- calculating a vertical capacitance based on said transparency factor;
- wherein said transparency factor comprises a measure of capacitance screening of a layer within said integrated circuit.
A method of performing capacitance extraction on an integrated circuit, said method comprising:
- inputting a specified wiring density and design requirements;
- determining a minimum spacing for wire segments based on said design requirements;
- adding imaginary virtual wires to said integrated circuit where allowed by said minimum spacing, said virtual wires complying with said wiring density;
- and
- calculating a lateral capacitance assuming said virtual wires are present in said integrated circuit.
A method of performing capacitance extraction on an integrated circuit, said method comprising:
- inputting a specified wiring density and design requirements;
- determining a minimum spacing for wire segments based on said design requirements;
- adding virtual wires to said integrated circuit where allowed by said minimum spacing, said virtual wires complying with said wiring density;
- and
- calculating a lateral capacitance assuming said virtual wires are present in said integrated circuit;
- wherein said virtual wires are imaginary and are not included in a final design of said integrated circuit.
A method of performing capacitance extraction on an integrated circuit, said method comprising:
- inputting a specified wiring density and design requirements;
- determining a minimum spacing for wire segments based on said design requirements;
- adding virtual wires to said integrated circuit where allowed by said minimum spacing, said virtual wires complying with said wiring density;
- and
- calculating a lateral capacitance assuming said virtual wires are present in said integrated circuit;
- wherein said virtual wires are utilized exclusively for said capacitance extraction.
A method of performing capacitance extraction on an integrated circuit, said method comprising:
- inputting a specified wiring density and design requirements;
- determining a minimum spacing for wire segments based on said design requirements;
- adding virtual wires to said integrated circuit where allowed by said minimum spacing, said virtual wires complying with said wiring density;
- calculating a lateral capacitance assuming said virtual wires are present in said integrated circuit;
- calculating a transparency factor based on said wiring density;
- and
- calculating a vertical capacitance based on said transparency factor.
A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform capacitance extraction during the design of an integrated circuit, said method comprising:
- inputting a specified wiring density and design requirements;
- determining a minimum spacing for wire segments based on said design requirements;
- calculating a transparency factor based on said wiring density;
- calculating a lateral capacitance assuming imaginary virtual wires are present in said integrated circuit;
- and
- calculating a vertical capacitance based on said transparency factor.
A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform capacitance extraction during the design of an integrated circuit, said method comprising:
- inputting a specified wiring density and design requirements;
- determining a minimum spacing for wire segments based on said design requirements;
- calculating a transparency factor based on said wiring density;
- calculating a lateral capacitance assuming virtual wires are present in said integrated circuit;
- and
- calculating a vertical capacitance based on said transparency factor;
- wherein said virtual wires are imaginary and are not included in a final design of said integrated circuit.
A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform capacitance extraction during the design of an integrated circuit, said method comprising:
- inputting a specified wiring density and design requirements;
- determining a minimum spacing for wire segments based on said design requirements;
- calculating a transparency factor based on said wiring density;
- calculating a lateral capacitance assuming virtual wires are present in said integrated circuit;
- and
- calculating a vertical capacitance based on said transparency factor;
- wherein said virtual wires are utilized exclusively for said capacitance extraction.
A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform capacitance extraction during the design of an integrated circuit, said method comprising:
- inputting a specified wiring density and design requirements;
- determining a minimum spacing for wire segments based on said design requirements;
- calculating a transparency factor based on said wiring density;
- calculating a lateral capacitance assuming virtual wires are present in said integrated circuit;
- and
- calculating a vertical capacitance based on said transparency factor;
- wherein said transparency factor comprises a measure of capacitance screening of a layer within said integrated circuit.
Dependencies are inferred from the claim text.