Digital circuit layout techniques using circuit decomposition and pin swapping
AssigneeMentor Graphics Corporation
InventorDavid E. Wallace
Life of this patent
Estimating the term…
Abstract
A technique for analyzing digital circuits to identify pin swaps is provided for circuit layout and similar tasks in which the circuit is first decomposed into regions. Logic functions of the regions are decomposed into a directed graph of the logic functions. A swap structure is created in accordance with the directed graph to facilitate identification of input equivalences.
Claims17
A method of analyzing a digital circuit to identify input equivalences comprising:
- decomposing the circuit into one or more fanout-free regions;
- creating a modified circuit structure from the decomposed regions;
- and
- identifying pin swap groups within the modified circuit structure.
A method of analyzing a digital circuit to identify input equivalences comprising:
- decomposing the digital circuit into one or more regions having a first set of specified characteristics;
- creating a modified circuit structure from the decomposed regions by decomposing logic functions of the decomposed regions into a directed graph of logic functions, said decomposing of logic functions of the decomposed regions including:
- generating quasi-canonical models for cells of the circuit;
- and creating a swap structure for the circuit using said models;
- and
- identifying pin swap groups within the modified circuit structure.
A method of analyzing a digital circuit to identify input equivalences comprising:
- decomposing the digital circuit into one or more regions having a first set of specified characteristics;
- creating a modified circuit structure from the decomposed regions by decomposing logic functions of the decomposed regions into a directed graph of logic functions, said decomposing including:
- generating quasi-canonical models for cells of the circuit:
- and
- creating a swap structure for the circuit using said models by:
- modifying the initial circuit structure to include large symmetric functions present in the initial circuit structure in the form of large functional blocks;
- and
- avoiding input rotations to inputs of the symmetric functions that affect genealogical constraints;
- identifying pin swap groups within the modified circuit structure.
A method of analyzing a digital circuit to identify input equivalences comprising:
- decomposing the digital circuit into one or more regions having a first set of specified characteristics;
- creating a modified circuit structure from the decomposed regions;
- and
- identifying pin swap groups within the modified circuit structure, said identifying comprising extracting swap groups from the modified circuit structure.
A computer system comprising:
- a storage medium having stored therein programming instructions designed to decompose a digital circuit design into one or more fanout-free regions, to create a modified circuit design from the decomposed regions, and to identify pin swap groups within the modified circuit design;
- and
- a processor coupled to the storage medium to execute the programming instructions.
A computer system comprising:
- a storage medium having stored therein programming instructions designed to decompose a digital circuit design into one or more regions having a first set of specified characteristics, to create a modified circuit design from the decomposed regions, and to identify pin swap groups within the modified circuit design, the instructions to identify pin swap groups comprising instructions to extract swap groups from the modified circuit design;
- and
- a processor coupled to the storage medium to execute the programming instructions.
An article of manufacture comprising:
- a recordable medium having recordable thereon programming instructions used to program a computer system, wherein the programming instructions, when executed, are designed to decompose a digital circuit design into one or more fanout-free regions, to create a modified circuit design from the decomposed regions, and to identify pin swap groups within the modified circuit design.
An article of manufacture comprising:
- a recordable medium having recordable thereon programming instructions used to program a computer system, wherein the programming instructions, when executed, are designed to decompose a digital circuit design into one or more regions having a first set of specified characteristics, to create a modified circuit design from the decomposed regions, and to identify pin swap groups within the modified circuit design, the programming instructions to identify pin swap groups comprising instructions to extract swap groups from the modified circuit design.
Dependencies are inferred from the claim text.