US 6,473,874 B1 · Method and system for managing timing error information

Abstract

The present invention relates to a timing error information managing system. This system comprises a timing error information file, a circuit information file, a correlating section for establishing a correlation between each of timing errors in the timing error information file and each of circuit configurations in the circuit information file, and for adding a circuit information pointer to the timing error information file and further for adding an error information pointer to the circuit information file, and a managing section for managing information on timing errors through the use of the circuit information pointer and the error information pointer. This configuration allows high-efficiency management of the timing error in formation, thereby achieving the speed-up of various kinds of processing using timing error information.

Claims44

Dependent claims

A timing error information managing method of managing information on timing errors located through a timing check of a circuit, comprising the steps of:

reading a timing error information file storing said information on said timing errors and a circuit information file storing information on configurations of said circuit;
establishing a correlation between each of said timing errors in said timing error information file and each of said circuit configurations in said circuit information file;
adding, to said timing error information file, a circuit information pointer for giving an instruction regarding a position of the storage of said information on said circuit configuration, causing each of said timing errors, in said circuit information file;
adding, to said circuit information file, an error information pointer for giving an instruction regarding a position of the storage of said information on said timing error, occurring in each of said circuit configurations, in said timing error information file;
and
managing said information on said timing errors through the use of said circuit information pointer and said error information pointer.

3 more elements

A timing error information managing system for managing information on timing errors located through a timing check of a circuit, comprising:

a timing error information file storing said information on said timing errors;
a circuit information file storing information on configurations of said circuit;
a correlating section for establishing a correlation between each of said timing errors in said timing error information file and each of said circuit configurations in said circuit information file, and for adding, to said timing error information file, a circuit information pointer for giving an instruction regarding a position of the storage of said information on said circuit configuration, causing the occurrence of each of said timing errors, in said circuit information file and further for adding, to said circuit information file, an error information pointer for giving an instruction regarding a position of the storage of said information on said timing error, occurring in each of said circuit configurations, in said timing error information file;
and
a managing section for managing said information on said timing errors through the use of said circuit information pointer and said error information pointer.

2 more elements

Dependencies are inferred from the claim text.

Method and system for managing timing error information

Life of this patent

Method and system for managing timing error information

Life of this patent

Abstract

Claims44