Alternate access mechanism for saving and restoring state of write-only register

A machine implemented method comprising:

• a) during a normal mode of operation,
• 1) storing a write-only control value in a write-only register,
• 2) reading a read value on a first data path;
• and
• b) during a save mode of operation,
• 1) reading the stored write-only control value on a second data path under the control of a control signal;
• 2) saving the stored write-only control value into a save area prior to removing power from the write-only register.

A chipset for providing an interface between a peripheral bus and an expansion bus, the chipset comprising:

• a peripheral-to-expansion bridge for providing bus transaction translations;
• and
• an integrated circuit component, the integrated circuit component comprising:
• a) a write-only register for storing a write-only control value during a normal mode of operation;
• b) a first data path for supplying the stored write-only control value;
• c) a second data path for supplying a read value;
• d) a control signal path for supplying a control signal for controlling reading the read value in the normal mode of operation and the stored write-only control value from the write-only register during a save mode of operation, the stored write-only control value being saved into a save area prior to removing power from the write-only register;
• and
• e) circuitry coupling the write-only register to the first data path, the second data path, and the control signal path to facilitate said reading during said normal mode of operation and said save mode of operation.