PCI delayed transaction time out counter and associated methods

In a slave device of the type which stores delayed transactions from a master on a PCI bus, the improvement comprising:

• a free running n-bit counter;
• a plurality of m-bit time out counters coupled to the free running n-bit counter, each time out counter coupled to an associated delayed transaction buffer of the slave, the free running counter selectively incrementing each time out counter, each time out counter generating a flush signal which deletes the delayed transaction information stored within the associated delayed transaction buffer after a time out period;
• and
• means for resetting each time out counter to zero after receipt of a delayed transaction by the associated delayed transaction buffer.

A PCI VLSI device operating as a slave to a master on a PCI bus, comprising:

• a plurality of delayed transaction buffers for storing delayed transaction information data, the data being used by the slave in a subsequent retry by the master to complete a transaction on the bus;
• a counter section for timing a time period for which the data is stored within each of the buffers, said counter section comprising a time out counter associated with each said buffer and a free running counter, said free running counter linked to each said time out counter;
• and
• means for flushing each of the buffers when the time period exceeds a preselected time out period.

A method for clearing a plurality of delayed transaction buffers associated with master-to-slave transactions on a PCI bus, comprising the steps of:

• providing a time out counter coupled to each of the plurality of buffers;
• providing a free running counter, the free running counter coupled to each time out counter:
• following receipt of a delayed transaction within one of the plurality of the buffers, counting time in the time out counter coupled to the one of the plurality or buffers via clock cycles of the free running counter;
• and
• flushing the one of the plurality of buffers after the time in the time out counter exceeds a pre-selected limit.