Semiconductor memory device capable of outputting a wordline voltage via an external pin

A nonvolatile semiconductor memory device, comprising:

• at least one electrically erasable and programmable memory cell adapted to store multi-bit data responsive to a plurality of threshold voltages;
• at least one wordline connected to the at least one cell;
• a first select signal generator adapted to activate one of a plurality of wordline select signals in a test mode responsive to a plurality of external select code signals;
• a voltage generator adapted to generate a wordline voltage corresponding to the active wordline select signal, the wordline voltage being applied to the at least one wordline when multi-bit data is read out from the at least one memory cell;
• and
• a switch circuit coupled to the semiconductor memory device and adapted to transfer the wordline voltage to a pad during the test mode.

A method of measuring wordline voltages in a semiconductor memory device comprising a memory cell array having a plurality of wordlines, a plurality of bitlines, and a plurality of memory cells located at intersections of the wordlines and the bitlines, a row selector adapted to select one of the wordlines and supply a wordline voltage to the selected wordline, and a wordline voltage generator adapted to generate other wordline voltages, the method comprising:

• receiving an external instruction signal indicative of a test mode;
• receiving an external select code signal corresponding to one of the other wordline voltages;
• activating one of a plurality of select signals corresponding to the other wordline voltages responsive to the external select code signal during the test mode;
• generating a wordline voltage corresponding to the activated select signal;
• and
• providing the wordline voltage to a pad responsive to the external instruction signal.