Reading method and circuit for a non-volatile memory
AssigneeSTMicroelectronics S.r.l.
InventorsMarco Pasotti, Giovanni Guaitini, Pier Luigi Rolandi, Guido De Sandre
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AssigneeSTMicroelectronics S.r.l.
InventorsMarco Pasotti, Giovanni Guaitini, Pier Luigi Rolandi, Guido De Sandre
Estimating the term…
A reading circuit having an array branch connected via an array bit line to an array memory cell, the content of which is to be read; a reference branch connected via a reference bit line to a current generator stage supplying a reference current; a current/voltage converter stage connected to the array branch and to the reference branch, and supplying at an array node and at a reference node respectively an array potential and a reference potential, which are correlated to the currents flowing respectively in the array branch and in the reference branch; a comparator stage connected to the array node and the reference node for comparing the array and reference potentials; a sample and hold stage arranged between the array node and the comparator stage and selectively operable to sample and hold the array potential; and a switching off stage for switching off the array branch.
Reading circuit for a non-volatile memory, comprising:
Reading method for a non-volatile memory, implemented by means of a reading circuit comprising a first branch in which a first current flows, and a second branch in which a second current flows;
A reading circuit for reading the content of an array memory cell, the reading circuit comprising:
A reading method for a non-volatile memory, implemented by means of a reading circuit comprising a first branch in which a first current flows, and a second branch in which a second current flows, said reading method comprising:
Dependencies are inferred from the claim text.