Semiconductor integrated circuit and nonvolatile semiconductor memory
AssigneesHitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
InventorsJiro Kishimoto, Hiroshi Sato, Satoshi Noda, Tatsuya Ishii, Shoji Kubono, Takashi Ogino
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Abstract
For a semiconductor integrated circuit having an internal booster circuit such as a flash memory, voltage booster circuits capable of generating a boosted voltage 10 times or more as high as a relatively low source voltage is to be realized. Charge pumps for carrying out first stage voltage boosting on the basis of a source voltage are configured of parallel capacity type units, and charge pumps for carrying out second stage voltage boosting on the basis of the boosted voltage generated by the first charge pumps are configured of serial capacity type units.
Claims23
A semiconductor integrated circuit comprising a voltage booster circuit for generating a boosted voltage on the basis of a source voltage supplied from outside, wherein:
- said voltage booster circuit comprises:
- a first voltage booster circuit, including parallel capacity type charge pumps, for carrying out a first stage of voltage boosting on the basis of the source voltage;
- and a second voltage booster circuit, including serial capacity type charge pumps, for carrying out a second stage of voltage boosting on the basis of the boosted voltage generated by said first voltage booster circuit.
A semiconductor integrated circuit provided with a voltage booster circuit for generating a boosted voltage on the basis of a source voltage supplied from outside, wherein:
- said voltage booster circuit comprises:
- a first voltage booster circuit, including parallel capacity type charge pumps, for carrying out a first stage of voltage boosting on the basis of the source voltage;
- and a second voltage booster circuit, including serial capacity type charge pumps, for carrying out a second stage of voltage boosting on the basis of the boosted voltage generated by said first voltage booster circuit;
- booster capacities in said parallel capacity type charge pumps are:
- capacities having, on the surface of a well region of the same first conductivity type as the well region of a second conductivity type over which MOSFETs of a first conductivity type are formed, MOSFETs of the second conductivity type and a contact region comprised of a semiconductor region of the same conductivity type as source and drain regions, and a conductive layer formed over the well region of said same conductivity type via an insulating film, wherein the well region of said same conductivity type is made a first electrode, said conductive layer is made a second electrode and said insulating film is made a dielectric, and
- the insulating film of the first stage side booster capacity, out of the booster capacities of different stages of said parallel capacity type charge pumps, is thinner than the insulating film of the final stage side booster capacity.
A nonvolatile memory having a floating gate electrode and a control gate electrode, wherein a threshold voltage varies according to injection or withdrawal of an electric charge into or from said floating gate electrode, and provided with a nonvolatile memory element for storing information according to that threshold voltage and with voltage booster circuits for generating a boosted voltage on the basis of a source voltage supplied from outside, wherein:
- said voltage booster circuits comprise a first voltage booster circuit, including parallel capacity type charge pumps, for carrying out first stage voltage boosting on the basis of the source voltage, and a second voltage booster circuit, including serial capacity type charge pumps, for carrying out second stage voltage boosting on the basis of the boosted voltage generated by said first voltage booster circuit;,
- said second voltage booster circuit generates:
- a first boosted voltage for injecting electric charges into the floating gate electrode of said nonvolatile memory element by utilizing the FN tunnel phenomenon, and
- a second boosted voltage for withdrawing electric charges from said floating gate electrode by utilizing the EN tunnel phenomenon.
A nonvolatile memory device comprising:
- a logic circuit including a decoder circuit;
- a memory array having a plurality of word lines;
- and
- a booster circuit including a first boost unit and a second boost unit,
- wherein said first boost unit has a parallel capacity type charge pump and supplies a first voltage boosted from a source voltage to said logic circuit, and
- wherein said second boost unit has a serial capacity type charge pump and supplies a second voltage boosted from said first voltage to said word line corresponding to an output of said decoder circuit.
Dependencies are inferred from the claim text.