Switching voltage regulator failure detection circuit and method

A switching voltage regulator failure detection circuit, said failure detection circuit comprising:

• a clock generator which outputs a clock signal,
• a driver circuit which, in response to said clock signal, alternately drives upper and lower output transistors of a switching regulator on and off to conduct current to an output inductor to provide a regulated output voltage,
• a current sense resistor connected in series with the current circuit of said upper output transistor such that, when said switching regulator is operating normally, the voltage across said resistor transitions above and below a predetermined threshold during each cycle of said clock signal as said upper output transistor is driven on and off,
• a comparator circuit connected across said current sense resistor and arranged to produce a comparator circuit out-put which toggles from a first state to a second state and back to said first state for every cycle of said clock signal as long as the voltage across said current sense resistor transitions above and below said predetermined threshold during said clock cycle, and
• a counter having a clock input connected to receive said clock signal, a reset input connected to receive said comparator circuit output, and a counter output, said counter arranged to count the clock cycles received at said clock input and to toggle said counter output when said counter has counted from an initial value to a predetermined count value, said counter reset to said initial value when said comparator output toggles from said first state to said second state, said counter toggling its output when said comparator output fails to toggle from said first state to said second state for a consecutive number of clock cycles equal to said predetermined count minus said initial value, said counter output thereby indicating when the voltage across said current sense resistor failed to transition above and below said predetermined threshold during a clock cycle for a consecutive number of clock cycles equal to said predetermined count minus said initial value.

A redundant power source comprising:

• a plurality of switching voltage regulators, the out-puts of which are connected in parallel to provide a common out-put voltage, each of said switching voltage regulators comprising:
• a clock generator which outputs a periodic clock signal,
• a driver circuit which, during each cycle of said clock signal, alternately drives upper and lower output transistors of a switching regulator on and off to conduct current to an output inductor to provide a regulated output voltage,
• a decision circuit connected to sense a parameter which, when said switching regulator is operating normally, transitions above and below a predetermined threshold during each cycle of said clock signal as said output transistors are driven on and off, and to produce a decision circuit output which toggles from a first state to a second state and back to said first state for every cycle of said clock signal as long as said sensed parameter transitions above and below said predetermined threshold during said clock cycle, and
• a counter having a clock input connected to receive said clock signal, a reset input connected to receive said decision circuit output, and a counter output, said counter arranged to count the clock cycles received at said clock input and to toggle said counter output when said counter has counted from an initial value to a predetermined count value, said counter reset to said initial value when said decision circuit output toggles from said first state to said second state,
• said counter toggling its output when said decision circuit output fails to toggle for a consecutive number of clock cycles equal to said predetermined count minus said initial value, said counter output thereby indicating when said sensed parameter failed to transition above and below said predetermined threshold during a clock cycle for a consecutive number of clock cycles equal to said predetermined count minus said initial value,
• said plurality of counter outputs thereby indicating the occurrence of a failure in their respective switching voltage regulators.

A method of detecting an output current failure for a switching voltage regulator, comprising the steps of:

• generating a periodic clock signal,
• sensing the current in the first of two output transistors of a switching voltage regulator which is driven on and off during each cycle of said clock signal to conduct current to an output inductor to provide a regulated output voltage, said sensed current transitioning above and below a predetermined threshold as said output transistor is driven on and off when said switching regulator is operating normally,
• determining if said sensed current transitions above and below said predetermined threshold during each cycle of said clock signal,
• counting the cycles of said clock signal,
• generating a failure signal when a predetermined number of cycles have been counted, and
• resetting said cycle count to zero once per clock cycle when said sensed current transitions above and below said predetermined threshold during said cycle,
• said failure signal thereby indicating when said sensed current failed to transition above and below said predetermined threshold during a clock cycle for a consecutive number of clock cycles equal to said predetermined number.