Delta sigma analog-to-digital converter
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsHiroya Ueno, Junji Nakatsuka
Life of this patent
Estimating the term…
Abstract
For the realization of a unipolar analog input range, in addition to the provision of an analog input sampling circuit having an input capacitor, a charge transfer circuit, an integrator having an integrating capacitor, a comparator, and a D-type flip-flop, there is further provided a reference voltage sampling circuit for selectively adding either of a subtraction and addition voltages which are different from each other to a sampled analog input voltage in response to a delayed comparator output. The reference voltage sampling circuit has a subtraction and addition capacitors differing in capacitance value from each other.
Claims9
A delta sigma analog-to-digital converter (ADC) having an analog input range in asymmetry with respect to a certain bias voltage, said delta sigma ADC comprising:
- sampling means for sampling, in synchronization with an input clock signal, an analog input voltage;
- addition/subtraction means for selectively adding either of a subtraction and addition voltages differing from each other to said sampled voltage;
- an integrator for integrating a voltage obtained by said selective addition;
- a comparator for comparing a voltage obtained by said integration with said bias voltage;
- delay means for delaying the output of said comparator by one clock cycle of said input clock signal;
- and
- control means for controlling the selection between said subtraction voltage and said addition voltage in said addition/subtraction means in response to the output of said delay means.
The delta sigma ADC of cliam 1, wherein said subtraction voltage and said addition voltage have opposite polarities.
A blood sugar analyzer comprising:
- a delta sigma analog-to-digital converter (ADC);
- an amplifier for supplying an analog input voltage to said delta sigma ADC;
- and
- a blood sugar level sensor for supplying to said amplifier a sensor current flowing in one direction;
- said delta sigma ADC having an analog input range in asymmetry with respect to a certain bias voltage, said delta sigma ADC comprising:
- sampling means for sampling, in synchronization with an input clock signal, an analog input voltage;
- addition/subtraction means for selectively adding either of a subtraction and addition voltages differing from each other to said sampled voltage;
- an integrator for integrating a voltage obtained by said selective addition;
- a comparator for comparing a voltage obtained by said integration with said bias voltage;
- delay means for delaying the output of said comparator by one clock cycle of said input clock signal;
- and
- control means for controlling the selection between said subtraction voltage and said addition voltage in said addition/subtraction means in response to the output of said delay means.
Dependencies are inferred from the claim text.