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US 6,472,897 B1Granted
Circuit and method for trimming integrated circuits
AssigneeMicro International Limited
InventorsYou-Yuh Shyr, Sorin Laurentiu Negru
Life of this patent
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AssigneeMicro International Limited
InventorsYou-Yuh Shyr, Sorin Laurentiu Negru
Estimating the term…
A programmable after-package, on-chip reference voltage trim circuit for an integrated circuit having a plurality of programmable trim cells generating a programmed sequence. A converter is provided to convert the bit sequence into a trim current. The trim current is added to an initial value of a reference voltage to be trimmed, as generated by the integrated circuit. Once the correct value of the trim current is determined, isolation circuitry is programmed to isolate the trim circuitry from the remainder of the IC, thereby freeing the logic and package pins associated with the IC for use by users of the IC. The preferred trim circuitry includes fuses which are blown in accordance with a bit value supplied to the trim cell to permanently fix a trim current value, once a best fit value is determined.
A programmable after-package, on-chip reference voltage trim circuit for an IC, said programmable trim circuit comprising:
A method of trimming a reference voltage for an integrated circuit, said method comprising the steps of:
Dependencies are inferred from the claim text.