Non-volatile semiconductor memory device and its manufacturing method
AssigneeKabushiki Kaisha Toshiba
InventorsToshitake Yaegashi, Kazuhiro Shimizu, Seiichi Aritome
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Abstract
In a non-volatile semiconductor memory device and a method for manufacturing the device, each memory cell and its select Tr have the same gate insulating film as a Vcc Tr. Further, the gate electrodes of a Vpp Tr and Vcc Tr are realized by the use of a first polysilicon layer. A material such as salicide or a metal, which differs from second polysilicon (which forms a control gate layer), may be provided on the first polysilicon layer. With the above features, a non-volatile semiconductor memory device can be manufactured by reduced steps and be operated at high speed in a reliable manner.
Claims2
A non-volatile semiconductor memory device comprising:
- a memory cell having a self-aligned double-layer gate structure which includes a gate insulating film, a first conductor serving as a floating gate layer, a second conductor serving as a control gate layer, and an insulating film electrically insulating the first and second conductors, the gate insulating film, the first conductor, the second conductor and the insulating film being formed above a semiconductor substrate;
- a transistor having a gate electrode which is formed above the semiconductor substrate and has a structure wherein a third conductor differing from the second conductor is stacked on the first conductor;
- and
- a resistive element with the double-layer gate structure, the resistive element including the first conductor used as a resistor, the second conductor and the insulating film having portions thereof removed from a region of the first conductor, and the third conductor provided on the region of the first conductor.
Dependencies are inferred from the claim text.