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AssigneeMotorola, Inc.
InventorsDaniel S. Marshall, William J. Ooms, Jerald A. Hallmark, Yang Wang
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A method of fabricating a field effect transistor including doping a continuous blanket layer in a semiconductor substrate structure adjacent the surface to include a source area and a drain area spaced from the source area. A high dielectric constant insulator layer is positioned on the surface of the semiconductor substrate structure overlying the continuous blanket layer to define a gate area between the source and drain areas. A gate contact on the insulator layer is selected to provide a work function difference that depletes the doped layer beneath the insulator layer. Further, the doped layer depth and dosage are designed such that the doped layer is depleted beneath the insulator layer by the selected work function difference of the gate contact and the semiconductor substrate.
A method of fabricating a field effect transistor comprising the steps of:
A method of fabricating a low overlap capacitance field effect transistor comprising the steps of:
A method of fabricating a low overlap capacitance field effect transistor as claimed in claim 11 wherein the step of doping the source area and the drain area spaced from the source area in the semiconductor substrate structure includes doping a source area and a spaced apart drain area with a depth and dosage such that the portions of the source and drain areas beneath the high dielectric constant insulator layer are depleted by a work function difference of the gate contact and the semiconductor substrate structure.
Dependencies are inferred from the claim text.