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US 6,470,422 B2Granted
Buffer memory management in a system having multiple execution entities
AssigneeIntel Corporation
InventorsZhong-ning Cai, Tosaku Nakanishi
Life of this patent
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Abstract
A system includes multiple program execution entities (e.g., tasks, processes, threads, and the like) and a cache memory having multiple sections. An identifier is assigned to each execution entity. An instruction of one of the execution entities is retrieved and an associated identifier is decoded. Information associated with the instruction is stored in one of the cache sections based on the identifier.
Claims17
A system comprising:
- a plurality of execution entities to generate instructions;
- a controller;
- and
- a multi-unit buffer memory having plural buffers,
- the controller having plural microsequencers associated with corresponding plural buffers, instructions associated with a first execution entity to be processed by a first microsequencer and instructions associated with a second execution entity to be processed by a second microsequencer.
2 more elements
A method for use in a system having plural execution entities, the method comprising:
- executing instructions of a first execution entity with a first microsequencer;
- executing instructions of a second execution entity with a second microsequencer;
- and
- accessing data in a buffer memory having plural buffers, wherein the first microsequencer accesses data in a first buffer and the second microsequencer accesses data in a second buffer.
1 more element
Dependencies are inferred from the claim text.