US 6,469,540 B2 · Reconfigurable device having programmable interconnect network suitable for implementing data paths

Abstract

A reconfigurable device includes a plurality of function cells and a programmable interconnect network which programmably connects the function cells. The programmable interconnect network includes horizontal programmable interconnect ways and vertical programmable interconnect ways. Each horizontal programmable interconnect way includes a short horizontal programmable interconnect channel and a long horizontal programmable interconnect channel, and each vertical programmable interconnect way includes a short vertical programmable interconnect channel and a long vertical programmable interconnect channel. In the horizontal programmable interconnect way, both the short horizontal programmable interconnect channel and the long horizontal programmable interconnect channel are constructed to have “shift structure”, thereby “sector segmentation” and problems related to the sector segmentation are avoided. The function cells are directly connected to the short horizontal programmable interconnect channel, but are not directly connected to the long horizontal programmable interconnect channel, therefore, signal transfer of input/output signals between the function cell and the long horizontal programmable interconnect channel is conducted necessarily through the short horizontal programmable interconnect channel and a programmable switch, thereby load capacitance on the long horizontal programmable interconnect channel is reduced and thereby high-speed signal transfer is realized.

A reconfigurable integrated circuit device comprising a plurality of function cells and a programmable interconnect network which programmably connects said plurality of function cells, wherein:

a plurality of tiles are disposed in a two-dimensional array which extends in a horizontal direction and a vertical direction, and
each of said plurality of tiles includes one of said plurality of function cells and part of said programmable interconnect network in the vicinity of the function cell, and
each said plurality of function cells includes:
a function block having first input terminals, one or more first output terminals, and functions from which a function is programmably selected and set thereto, for generating an output signal from signals supplied to the first input terminals according to the function which has been set thereto and outputting the generated output signal from the one or more first output terminals;
input selection each of which has second input terminals and a second output terminal, for programmably setting one of the second input terminals to be connected to the second output terminal;
an output selection switch having a third input terminal and third output terminals, for programmably setting each of the third output terminals to be connected to the third input terminal or to be in high impedance status;
and
input/output lines which are connected to the second input terminals of the input selection switches and the third output terminals of the output selection switch, and
said second output terminal is connected to said first input terminal, and said third input terminal is connected to said first output terminal, and
the programmable interconnect network includes horizontal programmable interconnect ways each of which runs in the horizontal direction in each row of the two-dimensional array respectively, and
the horizontal programmable interconnect way includes a short horizontal programmable interconnect channel and a long horizontal programmable interconnect channel, and
the short horizontal programmable interconnect channel includes M short horizontal lanes (M:
natural number) each of which includes short horizontal programmable switches which are provided to every M tiles aligned in the horizontal direction and short horizontal interconnect line segments as seamless lines connecting adjacent short horizontal programmable switches, and
the horizontal positions of tiles containing the short horizontal programmable switches of each short horizontal lane of the short horizontal programmable interconnect channel are successively shifted between adjacent short horizontal lanes by 1 tile width, and
the long horizontal programmable interconnect channel includes M long horizontal lanes each of which includes long horizontal programmable switches which are provided to every N tiles (N:
natural number) aligned in the horizontal direction and long horizontal interconnect line segments as seamless lines connecting adjacent long horizontal programmable switches, and
the horizontal positions of tiles containing the long horizontal programmable switches of each long horizontal lane of the long horizontal programmable interconnect channel are successively shifted between adjacent long horizontal lanes by P tile widths (P:
natural number≧4, P=N/M), and
each short horizontal interconnect line segment is connected to one of the long horizontal interconnect line segments through an inter-horizontal-channel programmable switch which is provided to each tile, and
long horizontal interconnect line segments to which the inter-horizontal-channel programmable switches of arbitrary M contiguous tiles aligned in the horizontal direction are connected belong to different long horizontal lanes, and
each input/output line of the function cell is directly connected to corresponding one of the short horizontal interconnect line segments running in the tile containing the function cell, and
each of the programmable switches programmably connects/disconnects the connection between the line segments that are connected thereto.

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Reconfigurable device having programmable interconnect network suitable for implementing data paths

Life of this patent

Reconfigurable device having programmable interconnect network suitable for implementing data paths

Life of this patent

Abstract

Claims32