Semiconductor device and method for manufacturing the same
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Jun Koyama, Setsuo Nakajima, Naoya Sakamoto
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Abstract
There is provided a semiconductor device having TFTs whose thresholds can be controlled. There is provided a semiconductor device including a plurality of TFTs having a back gate electrode, a first gate insulation film, a semiconductor active layer a second gate insulation film and a gate electrode, which are formed on a substrate, wherein an arbitrary voltage is applied to the back gate electrode.
Claims58
An active matrix semiconductor display comprising:
- an active matrix circuit formed over a substrate;
- a signal line driving circuit formed over said substrate;
- and
- a scan line driving circuit formed over said substrate;
- wherein each of said signal line driving circuit and said scan line driving circuit has a plurality of thin film transistors, each of said plurality of thin film transistors comprising a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region;
- wherein a threshold control circuit for controlling thresholds of said plurality of thin film transistors is formed over said substrate,
- wherein a back gate electrode electrically connected to said threshold control circuit is provided to each of said plurality of thin film transistors, and
- wherein said back gate electrode is formed below said channel region with a gate insulation film interposed therebetween.
An active matrix semiconductor display comprising:
- an active matrix circuit formed over a substrate;
- a signal line driving circuit formed over said substrate;
- and
- a scan line driving circuit formed over said substrate;
- wherein each of said signal line driving circuit and said scan line driving circuit has a plurality of thin film transistors, each of said plurality of thin film transistors comprising a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region;
- wherein a threshold control circuit for controlling thresholds of said plurality of thin film transistors is formed over said substrate,
- wherein a control terminal having a back gate electrode is provided to each of said plurality of thin film transistors and is electrically connected to said threshold control circuit, and
- wherein said back gate electrode is formed below said channel region with a gate insulation film interposed therebetween.
An active matrix semiconductor display comprising:
- an active matrix circuit comprising a plurality of pixel thin film transistors over a substrate;
- a signal line driving circuit comprising a plurality of first thin film transistors over said substrate, each of said plurality of first thin film transistors comprising a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region;
- a scan line driving circuit comprising a plurality of second thin film transistors over said substrate, each of said plurality of second thin film transistors comprising a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region;
- a threshold control circuit for controlling thresholds of said plurality of first and second thin film transistors;
- and
- a back gate electrode provided to each of said plurality of first and second thin film transistors,
- wherein said back gate electrode is electrically connected to said threshold control circuit, and
- wherein said back gate electrode is formed below said channel region with a gate insulation film interposed therebetween.
An active matrix semiconductor display comprising:
- an active matrix circuit comprising a plurality of pixel thin film transistors over a substrate;
- a signal line driving circuit comprising a plurality of first thin film transistors over said substrate, each of said plurality of first thin film transistors comprising a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region;
- a scan line driving circuit comprising a plurality of second thin film transistors over said substrate, each of said plurality of second thin film transistors comprising a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region;
- and
- a threshold control circuit for controlling thresholds of said plurality of first and second thin film transistors;
- a control terminal having a back gate electrode provided to each of said plurality of first and second thin film transistors,
- wherein said control terminal is electrically connected to said threshold control circuit, and
- wherein said back gate electrode is formed below said channel region with a gate insulation film interposed therebetween.
An inverter circuit comprising.
- a first p-channel thin film transistor having a back gate electrode over a substrate;
- a second p-channel thin film transistor having a back gate electrode over said substrate;
- and
- a first n-channel thin film transistor having a back gate electrode over said substrate,
- wherein a relationship expressed by VtbP1>VthP2 exists between a threshold voltage VthP1 at the time of application of a back gate voltage to the back gate electrode of said first p-channel thin film transistor and a threshold voltage VthP2 at the time of application of a back gate voltage to the back gate electrode of said second p-channel thin film transistor,
- wherein each of said first p-channel thin film transistor, second p-channel thin film transistor, and first n-channel thin film transistor comprises a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region, and
- wherein said back gate electrode is formed below said channel region with a gate insulation film interposed therebetween.
An inverter circuit comprising:
- a first p-channel thin film transistor having a back gate electrode over a substrate;
- a second p-channel thin film transistor having a back gate electrode over said substrate;
- a first n-channel thin film transistor having a back gate electrode over said substrate;
- and
- a second n-channel thin film transistor having a back gate electrode over said substrate,
- wherein relationships expressed by |VthP1>VthP2| and |VthN1<VthN2| exist between a threshold voltage VthP1 at the time of application of a back gate voltage to the back gate electrode of said first p-channel thin film transistor, a threshold voltage VthP2 at the time of application of a back gate voltage to the back gate electrode of said second p-channel thin film transistor, a threshold voltage VthN1 at the time of application of a back gate voltage to the back gate electrode of said first n-channel thin film transistor and a threshold voltage VthN2 at the time of application of a back gate voltage to the back gate electrode of said second n-channel thin film transistor,
- wherein each of said first p-channel thin film transistor, second p-channel thin film transistor, and first n-channel thin film transistor comprises a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region, and
- wherein said back gate electrode is formed below said channel region with a gate insulation film interposed therebetween.
An active matrix semiconductor display comprising:
- an active matrix circuit comprising a plurality of thin film transistors over a substrate;
- a signal line driving circuit comprising a plurality of thin film transistors over said substrate;
- a scan line driving circuit comprising a plurality of thin film transistors over said substrate;
- a threshold control circuit for controlling thresholds of the plurality of thin film transistors;
- and
- a back gate electrode provided to each of said plurality of thin film transistors,
- wherein said back gate electrode is electrically connected to said threshold control circuit, and
- wherein said back gate electrode is formed below said channel region with a gate insulation film interposed therebetween.
A driving circuit for an active matrix semiconductor display comprising:
- a signal line driving circuit formed over a substrate;
- and
- a scan line driving circuit formed over said substrate;
- wherein each of said signal line driving circuit and said scan line driving circuit has a plurality of thin film transistors, each of said plurality of thin film transistors comprising a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region;
- wherein a threshold control circuit for controlling thresholds of said plurality of thin film transistors is formed over said substrate,
- wherein a back gate electrode electrically connected to said threshold control circuit is provided to each of said plurality of thin film transistors, and
- wherein said back gate electrode is formed below said channel region with a gate insulation film interposed therebetween.
A driving circuit for an active matrix semiconductor display comprising:
- a signal line driving circuit formed over a substrate;
- and
- a scan line driving circuit formed over said substrate;
- wherein each of said signal line driving circuit and said scan line driving circuit has a plurality of thin film transistors, each of said plurality of thin film transistors comprising a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region;
- wherein a threshold control circuit for controlling thresholds of said plurality of thin film transistors is formed over said substrate;
- wherein a control terminal having a back gate electrode is provided to each of said plurality of thin film transistors and is electrically connected to said threshold control circuit, and
- wherein said back gate electrode is formed below said channel region with a gate insulation film interposed therebetween.
A driving circuit for an active matrix semiconductor display comprising:
- a signal line driving circuit comprising a plurality of first thin film transistors over a substrate, each of said plurality of first thin film transistors comprising a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region;
- a scan line driving circuit comprising a plurality of second thin film transistors over said substrate, each of said plurality of second thin film transistors comprising a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region;
- a threshold control circuit for controlling thresholds of said plurality of first and second thin film transistors;
- and
- a back gate electrode provided to each of said plurality of first and second thin film transistors,
- wherein said back gate electrode is electrically connected to said threshold control circuit, and
- wherein said back gate electrode is formed below said channel region with a gate insulation film interposed therebetween.
A driving circuit for an active matrix semiconductor display comprising:
- a signal line driving circuit comprising a plurality of first thin film transistors over a substrate, each of said plurality of first thin film transistors comprising a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region;
- a scan line driving circuit comprising a plurality of second thin film transistors over said substrate, each of said plurality of second thin film transistors comprising a source region, a drain region, a channel region between said source and drain region, and a gate electrode over said channel region;
- a threshold control circuit for controlling thresholds of said plurality of first and second thin film transistors;
- and
- a control terminal having a back gate electrode provided to each of said plurality of first and second thin film transistors,
- wherein said control terminal is electrically connected to said threshold control circuit, and
- wherein said back gate electrode is formed below said channel region with a gate insulation film interposed therebetween.
A semiconductor device having at least one thin film transistor over a substrate, said thin film transistor comprising:
- a back gate electrode formed over said substrate;
- a first gate insulation film formed over said back gate electrode;
- a semiconductor active layer formed over said first gate insulation film;
- a second gate insulation film formed over said semiconductor active layer;
- and
- a gate electrode formed on said second gate insulation film,
- wherein said back gate electrode is formed below said semiconductor active layer, and
- wherein an arbitrary voltage is applied to said back gate electrode by a threshold control circuit.
A semiconductor device comprising:
- a plurality of pixel thin film transistors arranged in the form of a matrix over a substrate;
- and
- a peripheral circuit comprising a plurality of thin film transistors for driving said plurality of pixel thin film transistors over said substrate,
- wherein each of said plurality of thin film transistors comprises a back gate electrode,
- wherein said back gate electrode is formed below each channel region of said plurality of thin film transistor with a gate insulation film interposed therebetween, and
- wherein an arbitrary voltage is applied to said back gate electrode by a threshold control circuit.
Dependencies are inferred from the claim text.