Stability in thyristor-based memory device

A semiconductor device having a thyristor-based device comprising:

• a memory cell;
• a thyristor storing data in the memory cell and having a capacitively-coupled control port and anode and cathode end portions, each of the end portions having an emitter region and a base region;
• and
• means for coupling to the base region of one of the end portions and for shunting low-level current at the base region of said one of the end portions.

A semiconductor device, comprising:

• a memory having a data-storage circuit;
• a thyristor device having anode and cathode end portions each of which includes an emitter region and an n-type base region or p-type base region, and further having a capacitively-coupled port that is controlled to switch the thyristor device for passing current or blocking current through the end portions;
• and
• a current-shunt region coupled to at least one of the base regions and adapted to shunt low-level current at said one of the base regions and inhibit the thyristor device from switching inadvertently from an off state to an on state.

A semiconductor device, comprising:

• means for storing data;
• a thyristor device including a capacitively-coupled port and anode and cathode end portions each of which includes an emitter region and an n-type base region or p-type base region, the capacitively-coupled port being adapted to switch the thyristor device between a current passing mode and a current blocking mode;
• and
• at the base region of at least one of the end portions, means for shunting low-level current that could otherwise cause the thyristor device to switch on inadvertently.