Capacitor with defect isolation and bypass
AssigneeIntel Corporation
InventorKishore K. Chakravorty
Life of this patent
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Abstract
Capacitors having defect isolation and bypass characteristics. The capacitors include a first electrode, a second electrode containing electrode segments, and a dielectric layer interposed between the first electrode and second electrode. The electrode segments of the second electrode are physically separated from other electrode segments. The capacitors further include an interconnection bus electrically coupling the electrode segments of the second electrode. Selective isolation of one or more electrode segments permits isolation and bypass of any defects identified in those electrode segments.
Claims11
A capacitor, comprising:
- a first electrode;
- a dielectric layer overlying the first electrode;
- a second electrode overlying the dielectric layer, wherein the second electrode comprises a plurality of electrode segments and wherein each of the electrode segments is physically separated from other electrode segments;
- and
- an interconnection bus coupling each of the plurality of electrode segments, wherein the interconnection bus contains at least one fusible link coupled to each of the plurality of electrode segments.
A capacitor, comprising:
- a plurality of capacitive elements, each capacitive element comprising:
- a first electrode segment;
- a dielectric layer overlying the first electrode segment;
- and
- a second electrode segment overlying the dielectric layer;
- a first interconnection bus coupling the first electrode segment of each of the plurality of capacitive elements;
- and
- a second interconnection bus, wherein the second electrode segment of each of the plurality of capacitive elements is coupled to the second interconnection bus through at least one fusible link.
A capacitor, comprising:
- a first electrode;
- a second electrode having a first portion, a second portion and a third portion, wherein the first portion, the second portion and the third portion are each physically separated from each other;
- a dielectric layer interposed between the first electrode and the second electrode;
- and
- an interconnection bus coupled to the first portion, the second portion and the third portion of the second electrode;
- wherein the interconnection bus comprises at least one fusible link coupled to the first portion of the second electrode;
- and
- wherein the first portion of the second electrode can be electrically isolated from the second portion and the third portion of the second electrode by opening the at least one fusible link coupled to the first portion of the second electrode without electrically isolating the second portion of the second electrode from the third portion of the second electrode.
Dependencies are inferred from the claim text.