Method and apparatus for processing control using a multiple redundant processor control system

A controller for executing an application program to process control information related to control elements comprising:

• a plurality of main processor modules each of which runs the application program;
• at least one input/output module for receiving and sending control information to said control elements communicating with each main processor module;
• a time synchronizing system for synchronizing the time clocks of said main processor modules;
• a voting system which exchanges information between selected ones of said main processor modules of said plurality of main processor modules and compares the information in each selected main processor module with the information in other selected ones of said main processor modules;
• a selection system which determines which of said plurality of main processor modules is a selected one of said plurality of main processor modules which is used to compare information in each main processor module;
• apparatus for sending a rendezvous signal to all other main processor modules;
• apparatus for receiving a rendezvous signal from all other main processor modules;
• a system for determining the clocking midpoint of all processor signals;
• a clock update apparatus which sends update signals to the clock to increase the clock rate if slower than the clocking midpoint;
• and
• a clock update apparatus which sends update signals to the clock to decrease the clock rate if faster than the clocking midpoint.

A controller for executing an application program to process control information related to control elements comprising:

• a plurality of main processor modules each of which runs the application program;
• at least one input/output module for receiving and sending control information to control elements, communicating with each main processor module;
• at least one communication module communicating external signals to said plurality of main processor modules;
• a time synchronizing system for synchronizing the time clocks of said main processor modules;
• a voting system which exchanges information between selected ones of said main processor modules of said plurality of modules and compares the information in each main processor module with the information in other selected ones of said main processor modules;
• a selection system which determines which of said plurality of main processor modules is a selected one of said plurality of main processor modules which is used to compare information in each main processor module;
• apparatus for sending a rendezvous signal to all other main processor modules;
• apparatus for receiving a rendezvous signal from all other main processor modules;
• a system for determining the clocking midpoint of all processor signals;
• a clock update apparatus which sends update signals to the clock to increase the clock rate if slower than the clocking midpoint;
• and
• a clock update apparatus which sends update signals to the clock to decrease the clock rate if faster than the clocking midpoint.

A controller for executing an application program to process control information related to control elements comprising:

• a plurality of main processor modules each of which runs the application program;
• at least one input/output module for receiving and sending control information to control elements communicating with each main processor module;
• a time synchronizing system for synchronizing the time clocks of said main processor modules;
• a voting system which exchanges information between selected ones of said main processor modules of said plurality of modules and compares the information in each main processor module with the information in other selected ones of said main processor modules;
• apparatus for sending a rendezvous signal to all other main processor modules;
• apparatus for receiving a rendezvous signal from all other main processor modules;
• and
• a clock update apparatus which sends update signals to the clock based on the clocking midpoint of all processor signals.

A controller for executing an application program to process control information related to control elements comprising:

• a plurality of main processor modules each of which runs the application program;
• a time synchronizing system for synchronizing the time clocks of said main processor modules;
• a voting system which exchanges information between selected ones of said main processor modules of said plurality of modules and compares the information in each main processor module with the information in other selected ones of said main processor modules;
• a selection system which determines which of said plurality of main processor modules is a selected one of said plurality of main processor modules which is used to compare information in each main processor module;
• a plurality of separate housings for enclosing electronic circuit boards representing said modules, having a common physical characteristics for receiving said electronic circuit boards and providing housing electrical connectors;
• at least one base plate circuit board for mounting each module which provides base plate electrical connectors for receiving the housing electrical connectors;
• apparatus for sending a rendezvous signal to all other main processor modules;
• apparatus for receiving a rendezvous signal from all other main processor modules;
• and
• a clock update apparatus which sends update signals to the clock based on the clocking midpoint of all processor signals.

A control system platform for executing an application program to process control information related to control elements comprising:

• a plurality of main processor modules each of which runs the application program;
• at least one input/output module for receiving and sending control information to control elements communicating with each main processor module;
• at least one communication module communicating external signals to said plurality of main processor modules;
• a time synchronizing system for synchronizing the time clocks of said main processor modules;
• a voting system which exchanges information between selected ones of said main processor modules of said plurality of modules and compares the information in each main processor module with the information in other selected ones of said main processor modules;
• a selection system which determines which of said plurality of main processor modules is a selected one of said plurality of main processor modules which is used to compare information in each main processor module;
• a plurality of separate housings for enclosing electronic circuit boards representing said modules, having a common physical characteristics for receiving said electronic circuit boards and providing housing electrical connectors;
• apparatus for sending a rendezvous signal to all other main processor modules;
• apparatus for receiving a rendezvous signal from all other main processor modules;
• and
• a clock update apparatus which sends update signals to the clock based on the clocking midpoint of all processor signals.

A control system platform for executing an application program to process control information related to control elements comprising:

• a plurality of main processor modules each of which runs the application program;
• at least one input/output module for receiving and sending control information to control elements communicating with each main processor module;
• a time synchronizing system for synchronizing the time clocks of said main processor modules;
• a voting system which exchanges information between selected ones of said main processor modules of said plurality of modules and compares the information in each main processor module with the information in other selected ones of said main processor modules;
• a selection system which determines which of said plurality of main processor modules is a selected one of said plurality of main processor modules which is used to compare information in each main processor module;
• a plurality of separate housings for enclosing electronic circuit boards representing said modules, having a common physical characteristics for receiving said electronic circuit boards and providing housing electrical connectors;
• at least one base plate circuit board for mounting each module which provides base plate electrical connectors for receiving the housing electrical connectors;
• a common rail system for mounting of said at least one base plate circuit board and providing electrical connections to each of said housings;
• apparatus for sending a rendezvous signal to all other main processor modules;
• apparatus for receiving a rendezvous signal from all other main processor modules;
• and
• a clock update apparatus which sends update signals to the clock based on the clocking midpoint of all processor signals.

A computer control system for executing an application program to process control information related to control elements comprising:

• a plurality of main processor modules each of which runs the application program;
• at least one input/output module for receiving and sending control information to control elements communicating with each main processor module;
• a time synchronizing system for synchronizing the time clocks of said main processor modules;
• a voting system which exchanges information between selected ones of said main processor modules of said plurality of modules and compares the information in each main processor module with the information in other selected ones of said main processor modules;
• a selection system which determines which of said plurality of main processor modules is a selected main processor module which is used to compare information in each main processor module;
• a plurality of separate housings for enclosing electronic circuit boards representing said modules, having a common physical characteristics for receiving said electronic circuit boards;
• a common rail system for mounting of said housings and providing electronic connections to each of said housings;
• apparatus for sending a rendezvous signal to all other main processor modules;
• apparatus for receiving a rendezvous signal from all other main processor modules;
• a system for determining the clocking midpoint of all processor signals;
• a clock update apparatus which sends update signals to the clock to increase the clock rate if slower than the clocking midpoint;
• and
• a clock update apparatus which sends update signals to the clock to decrease the clock rate if faster than the clocking midpoint.

A control system platform for executing a control system program for managing a control system and evaluating the accuracy of information related to said control system, said platform comprising:

• a plurality of main processor modules, each executing a copy of said application program;
• at least one field input/output module communicating with each main processor module;
• a voting system for comparing information between said main processor modules, and
• a restoring system for restoring valid information for access by said main processor modules;
• apparatus for sending a rendezvous signal to all other main processor modules;
• apparatus for receiving a rendezvous signal from all other main processor modules;
• and
• a clock update apparatus which sends update signals to the clock based on the clocking midpoint of all processor signals.

A control system for executing an application program and evaluating the accuracy of input/output information comprising:

• a plurality of main processor modules, each executing said application program;
• at least one field input/output module communicating with each main processor module;
• a voting system for comparing information between said main processor modules;
• and
• a time synchronizing system for synchronizing the time clocks of said main processor modules including:
• apparatus for sending a rendezvous signal to all other main processor modules,
• apparatus for receiving a rendezvous signal from all other main processor modules, and
• a clock update apparatus which sends update signals to the clock based on the clocking midpoint of all processor signals.

A voting system which exchanges information between selected ones of a main processor modules of said plurality of modules and compares the information in each main processor module with the information in other selected ones of said main processor modules comprising:

• an apparatus for loading control system related information from each processor for storage in every other processor;
• a comparison apparatus for comparing loaded control system related information with the comparing processor's control system information;
• memory for storing the results of said comparison;
• a selection apparatus for determining which loaded information compares with said comparing processor's information;
• a default apparatus for storing a default indication where the comparing processor's information fails to compare with a majority of said loaded processor information;
• and
• a time synchronizing system for synchronizing the time clocks of said main processor modules including:
• apparatus for sending a rendezvous signal to all other main processor modules,
• apparatus for receiving a rendezvous signal from all other main processor modules, and
• a clock update apparatus which sends update signals to the clock based on the clocking midpoint of all processor signals.

A control system for executing an application program and evaluating the accuracy of input/output information comprising:

• a plurality of main processor modules;
• at least one field input/output module communicating with each main processor module;
• a voting system for comparing information between said main processor modules;
• and
• a time synchronizing system for synchronizing the time clocks of said main processor modules including:
• apparatus for sending and receiving rendezvous signals to and from all other main processor modules, and
• a clock update apparatus which sends update signals to the clock based on the clocking midpoint of all processor signals.

A control system platform for running a control system program which processes information related to a control system;

• said control system platform comprising:
• a plurality of processors executing said control system program and processing said control system information said processors mounted to a common power rail;
• at least one input/output module for sending and receiving said information related to said control system;
• communicating with each of said processors mounted to said common power rail communicating with said plurality of processors;
• at least one communication module for receiving external signals and exchanging external signals with each of said processors and external signals;
• mounted to said common power rail communicating with said plurality of processors over a communications bus;
• a validation system on each processor for evaluating said control system information to be processed by said control system program prior to processing by said control system program;
• said evaluation system comparing categories of information stored in memory on each processor with the same category of information in memory on other processors and selecting information on which a majority of processors compare as valid information and storing said valid information into the memory of any processor for which the information did not compare with the majority of processors;
• each of said processors being interconnected on an inter-processor bus through a loop-back path;
• said loop back path applying the signals for transmitting information by each transmitting processor to other processors on said bus as an attenuated loop-back signal to said transmitting processor;
• a storage area in the transmitting processor memory for storing said loop-back information;
• a comparator for comparing signals transmitted by said other processors on said bus with said loop back signals to determine if the information in said loop-back signals is the same as the signals transmitted by said other processors;
• and
• a time synchronizing system for synchronizing the time clocks of said main processor modules including apparatus for sending and receiving rendezvous signals to and from all other main processor modules and a clock update apparatus which sends update signals to the clock based on the clocking midpoint of all processor signals.

A method for determining the voting mode of a plurality of processors each having memory and coupled to a inter processor bus comprising the steps of:

• exchanging information with said plurality of processors over said bus transmitting a category of information from a first processor on said bus to a second processor on the bus;
• passing said transmitted information through an attenuated loop-back path to said first processor;
• capturing said transmitted loop-back information in said first processor memory;
• comparing said attenuated loop back information captured in said first processor memory with the information transmitted by said first processor;
• storing a first result of said comparing in said first processor's memory;
• faulting the first processor when the first result indicates a difference in said information;
• capturing second processor information which is received by said first processor from a second processor on said bus in said first processor memory;
• comparing said second processor captured information with the same category of information in said first processor;
• faulting the second processor when the second result indicates a difference in said information;
• reconfiguring said system to perform comparison with memory information from other processors without using faulted processors;
• sending a rendezvous signal to said first processor;
• receiving a rendezvous signal from said first processor;
• and
• updating the clock of said first processor and said second processor based on the clocking midpoint of all processor signals.

A method of voting between a plurality of processors having memory comprising the steps of:

• exchanging information between said processors;
• comparing information in selected categories in each processor, with the information received from other processors in the same selected category;
• determining if said information conforms in a majority of processors in said category;
• and
• restoring said conformed category of information in all non-conforming processors;
• sending a rendezvous signal to the other processors;
• receiving a rendezvous signal from the other processors;
• and
• sending update signals to the clock based on the clocking midpoint of all processor signals.