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US 6,446,251 B1Granted
Method and apparatus for socket-based design with reusable-IP
OwnerDavid Neal Gardner, Robert E. Garnerinventors
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OwnerDavid Neal Gardner, Robert E. Garnerinventors
Estimating the term…
A method and apparatus for socket-based design with reusable intellectual property (IP) includes a chip integration system (CIS) that provides designers with a convenient method to create and describe a system on a chip (SOC) design independent of design flow. A Chip Integration Description Language (CIDL) is also disclosed that provides a mechanism for defining interfaces between IP cores in a way that isolates a system designer from much of the connection information previously required is also disclosed. Using CIDL, a system designer is able to rapidly connect multiple blocks of intellectual property (IP) based upon the functionality of the blocks rather than traditional hardware-specific connection methods. The details pertaining to specific connections that may be needed are encapsulated within a CIDL-based file that is typically written by the IP core designer. The actual connection of signals between blocks of IP, however, is performed by a CIDL compiler that uses the CIDL file(s) as input.
A method of generating a system on a chip (SOC) design, the method comprising:
An article of manufacture comprising a machine readable medium having a plurality of machine readable instructions stored thereon, wherein when the instructions executed, the instructions cause a system to:
An apparatus comprising:
Dependencies are inferred from the claim text.