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US 6,446,231 B1Granted
Method for testing a semiconductor integrated circuit when a difference between max current and min current exceeds a threshold value
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsChizuru Inoshita, Kazuo Aoki
Life of this patent
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Abstract
In a method of testing a semiconductor integrated circuit, setting of a logical state of elements that constitute a semiconductor integrated circuit to be measured is sequentially changed. The current from a static-time power source current passing through the elements is measured several times while the settings are changed. Maximum and minimum currents are obtained. When the difference between the maximum and the minimum current exceeds a threshold value it is determined that the semiconductor integrated circuit is defective.
Claims2
A method of testing a semiconductor integrated circuit comprising:
- supplying an input signal to a logic circuit of a semiconductor integrated circuit;
- repeatedly measuring current from a static-time power source passing through a plurality of elements that constitute the semiconductor integrated circuit while sequentially changing and setting a logical state of the plurality of elements;
- extracting a maximum current and a minimum current from the plurality of the currents that have been measured;
- and
- determining that the semiconductor integrated circuit is defective when a difference between the maximum current and the minimum current exceeds a first threshold value.
2 more elements
Dependencies are inferred from the claim text.