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AssigneeAdvanced Micro Devices, Inc.
InventorsDerrick R. Meyer, Scott A. White, Michael T. Clark, Philip E. Madrid
Estimating the term…
A method and apparatus for controlling power management state transitions between two devices, e.g., a processor and a bus bridge, that are connected through a clock forwarded interface bus in a computer system. The bus bridge is configured to coordinate disconnection of the processor from the interface. Particularly, the bus bridge may use a fist signal to indicate whether or not the processor is to be disconnected from the interface (e.g. a CONNECT signal) and the processor may use a second signal to indicate whether or not the processor is to be disconnected from the interface (e.g. a PROCREADY signal). The processor is disconnected from the interface responsive to both the first signal and the second signal indicating that the processor is to be disconnected. The signals may also be used to reconnect the processor to the interface.
A computer system comprising:
A bus bridge comprising circuitry for connecting to an interface comprising one or more buses, wherein the circuitry is coupled to receive a first forwarded clock corresponding to at least one of the one or more buses, wherein the circuitry is configured to capture data responsive to the first forwarded clock, and wherein the circuitry is configured to transmit a second forwarded clock corresponding to at least one of the one or more buses, and wherein the circuitry is configured to use a first signal to indicate whether or not a processor is to be disconnected from the interface, and wherein the circuitry is coupled to receive a second signal to indicate whether or not the processor is to be disconnected from the interface, and wherein the processor is disconnected from the interface responsive to both the first signal and the second signal indicating that the processor is to be disconnected from the interface.
A processor comprising circuitry for connecting to an interface comprising one or more buses, wherein the circuitry is configured to transmit at least a first forwarded clock corresponding to at least one of the one or more buses, and wherein the circuitry is coupled to receive at least a second forwarded clock corresponding to at least one of the one or more buses, wherein the circuitry is configured to capture data on the at least one of the one or more buses, and wherein the processor is coupled to receive a first signal to indicate whether or not the processor is to be disconnected from the interface, and wherein the circuitry is configured to use a second signal to indicate whether or not the processor is to be disconnected from the interface, and wherein the processor is disconnected from the interface responsive to both the first signal and the second signal indicating that the processor is to be disconnected from the interface.
A method comprising:
Dependencies are inferred from the claim text.