Address re-mapping for memory module using presence detect data
AssigneeInternational Business Machines Corporation
InventorsTimothy Jay Dell, Mark William Kellogg
Life of this patent
Estimating the term…
Abstract
A memory module comprising: a plurality of memory devices associated with the module; each of the memory devices being configured in M banks; and a logic circuit for configuring the memory module to operate in a programmable addressing mode; the logic circuit receiving a number of address inputs and a number of bank address signals from a memory controller with the address inputs and bank address input signals corresponding to N bank memory devices; the logic circuit re-mapping at least one of said address inputs as an additional bank address signal to the memory device or at least one of the bank address signals to a different device bank address.
Claims9
A memory module comprising:
- a plurality of memory devices associated with the memory module, each of said memory devices being configured in M banks, and a logic circuit for configuring the memory module to operate in a programmable addressing mode;
- said logic circuit receiving a number of address inputs and a number of bank address signals from a memory controller with said address inputs and bank address input signals corresponding to N bank memory devices;
- and are integers and can be different;
- the logic circuit remapping at least one of the address inputs as an additional bank address signal to the memory device;
- and wherein said memory module comprises a memory that stores modified PD data written by said system controller that corresponds to a requested addressing mode, and a non-volatile memory that stores initial PD data, said memory and non-volatile memory being operatively controlled by said logic circuit.
A memory module comprising:
- a system controller;
- a memory module comprising:
- a plurality of memory devices associated with the module;
- each of the memory devices being configured in M banks;
- and a logic circuit for configuring the memory module to operate in a programmable addressing mode;
- the logic circuit receiving a number of address inputs and a number of bank address signals from a memory controller with the address inputs and bank address input signals corresponding to N bank memory devices;
- wherein M and N are integers and can be different (abstract);
- the logic circuit remapping at least one of the address inputs as an additional bank address signal to the memory device;
- and wherein said memory module comprises a memory that stores modified PD data written by said system controller that corresponds to a requested addressing mode, and a non-volatile memory that stores initial PD data, said memory and non-volatile memory being operatively controlled by said logic circuit.
A method of using an M bank memory device in a computer system that has N bank addressing, wherein M and N are integers that can be different, comprising the step of:
- a) inputting address signals from a system controller to a logic circuit, said address signals including a number of address inputs and a number of bank address signals;
- b) re-mapping at least one of said address inputs as an additional bank address signal or at least one bank address signal to a different device bank address;
- and
- c) providing said address signals, said bank address signals and said additional said bank address signal as inputs to the memory device;
- wherein said computer system includes a memory module comprising a memory that stores modified PD data written by said system controller that corresponds to a requested addressing mode, and a non-volatile memory that stores initial PD data, said memory and non-volatile memory being operatively controlled by said logic circuit.
A method of using an M bank memory device in a computer system that has N bank addressing, wherein M and N are integers that can be different, comprising the step of:
- a) inputting address signals from a system controller to a logic circuit, said address signals including a number of address inputs and a number of bank address signals;
- b) re-mapping at least one of said address inputs as an additional bank address signal or at least one bank address signal to a different device bank address;
- and
- c) providing said address signals, said bank address signals and said additional said bank address signal as inputs to the memory device;
- wherein said computer system includes a memory module comprising a memory that stores modified PD data written by said system controller that corresponds to a requested addressing mode, and a non-volatile memory that stores initial PD data, said memory and non-volatile memory being operatively controlled by said logic circuit.
Dependencies are inferred from the claim text.