Cache bank conflict avoidance and cache collision avoidance

A system for moving data between a cache and a register file, wherein the cache comprises at least two banks, the system comprising:

• first means for performing a plurality of first cache operations in one bank;
• second means for performing a plurality of second cache operations in another bank;
• third means for performing another plurality of second cache operations in the one bank;
• and
• fourth means for performing another plurality of first cache operations in the another bank;
• wherein the first, second, third, and fourth means operate until a predetermined condition occurs, and both of the first cache operations consists of one of a plurality of load operations and a plurality of store operations, and both of the second cache operations consists of the other of the plurality of load operations and the plurality of store operations, and wherein said first and second means operate substantially simultaneously, said third and fourth means operate substantially simultaneously, said third means operates after said first means, and said fourth means operates after said second means.

A method of moving data associated with a cache of a processor, wherein said cache comprises at least two banks, comprising:

• (a) receiving a plurality of memory operations by a cache manager of said cache;
• (b) identifying a plurality of load operations from said plurality of memory operations that are associated with a first bank of said at least two banks;
• (c) identifying a plurality of store operations from said plurality of memory operations that are associated with a second bank of said at least two banks;
• (d) loading data associated with said plurality of load operations from said first bank of said at least two banks;
• and
• (e) storing data associated with said plurality of store operations in said second bank of said at least two banks;
• wherein steps (d) and (e) are performed substantially concurrently.