Programmable time slot interface bus arbiter
AssigneeAgere Systems Guardian Corp.
InventorsFrederick Harrison Fischer, Avinash Velingker, Kenneth Daniel Fitch, Ho Trong Nguyen
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AssigneeAgere Systems Guardian Corp.
InventorsFrederick Harrison Fischer, Avinash Velingker, Kenneth Daniel Fitch, Ho Trong Nguyen
Estimating the term…
A method and apparatus allowing two independent arbiters which do not directly talk to one another to function on a common system bus, allowing efficient operation of a master controller, and virtually endless capability to add peripherals to the common system bus without problems or major modifications commonly associated with additional arbitration overhead. A master controller sets time slot parameters for an external, subordinate arbiter as often as desired. Based on the time slot parameter information, the subordinate arbiter functions on an electrically separated portion of the common system bus during all times but for a time slot associated with communication of the super arbiter over the entire common system bus. During this time, a tri-state buffer element allows communication between portions of the common system bus. In an adaptive arbitration mode, the subordinate arbiter combines static time slot information assigned in configuration registers together with actual bus requests to generate grant signals to the requesting devices, and reassigns all or portions of time slots which, although assigned to a particular device, are left unused for the relevant system cycle. A historical buffer may be maintained for any or all time slots. Using this historical information, long term statistical information may be generated. Moreover, the master controller may re-tune time slot configurations based on the historical information regarding past recent use of the relevant time slots.
Apparatus for arbitrating access to a time division multiplexed system bus, comprising:
A method of programming a subordinate arbiter from a controller associated with a super arbiter, comprising:
Apparatus for programming a subordinate arbiter from a controller associated with a super arbiter, comprising:
A system bus arbiter, comprising:
A bus arbitrated system, comprising:
Dependencies are inferred from the claim text.