Non-volatile semiconductor memory and methods of driving, operating, and manufacturing this memory

A non-volatile semiconductor memory having a transistor comprising;

• a first conductance region formed in a surface of a semiconductor substrate of a first conductance type, having a higher concentration than said semiconductor substrate;
• first and second layers of a second conductance within said first conductance region, opposite to each other through a channel region of a first conductance type;
• a two-storied gate electrode composed of a floating gate and a control gate formed through a gate insulating film on said channel region of the first conductance type;
• and
• an electric buffer layer of the second conductance type, formed within said first conductance region between at least one of said first and second diffused layers and said channel region,
• wherein said diffused layer adjacent to said electric field buffer layer does not overlap with said two-storied gate electrode.

A non-volatile semiconductor memory having a transistor comprising;

• a first conductance region formed in a surface of a semiconductor substrate of a first conductance type, having a higher concentration than said semiconductor substrate;
• first and second diffused layers of a second conductance type formed within said first conductance region, opposite to each other through a channel region of the first conductance type;
• a two-storied gate electrode composed of a floating gate and a control gate formed through a gate insulating film on said channel region of the first conductance type;
• and
• an electric field buffer layer of the second conductance type, formed within said first conductance region between at least one of said first and second diffused layers and said channel region,
• where in said first conductance region is formed by containing said electric field buffer layer and said diffused layer adjacent thereto, and wherein said diffused layer adjacent to said electric field buffer layer does not overlap with said two-storied gate electrode.