MRAM with midpoint generator reference and method for readout

Magnetoresistive random access memory architecture comprising:

• a substrate;
• at least one data column of memory cells positioned on the substrate and connected to have information stored therein, each memory cell including at least one non-volatile magnetoresistive element programmable to one of a data-Rmax and a data-Rmin state;
• at least one reference column including at least one midpoint generator positioned on the substrate adjacent the data column, the midpoint generator including a first terminal coupled to the reference column and a second terminal, a first series circuit including a first magnetoresistive element with a resistance equal to reference-Rmax connected in series with a first magnetoresistive element with a resistance equal to reference-Rmin, the first series circuit connected in series between the first terminal and the second terminal, and a second series circuit including a second magnotoresistive element with a resistance equal to reference-Rmax connected in series with a second magnetoresistive element with a resistance equal to reference-Rmin, the second series circuit connected in series between the first terminal and the second terminal and in parallel with the first series circuit, whereby a total resistance between the first terminal and the second terminal is a midpoint between reference-Rmax and reference-Rmin;
• and
• a differential read-out circuit coupled to the data column and to the reference column for differentially comparing a data voltage generated from the data column to a reference voltage generated from the midpoint generator cell and providing a data output signal.

Magnetoresistive random access memory architecture comprising:

• a plurality of data columns of memory cells connected to have information stored therein, each memory cell including a magnetoresistive tunnel junction element programmable to one of a data-Rmax and a data-Rmin state, the plurality of data columns being divided into data blocks, each data block including a portion of the plurality of data columns;
• a plurality of reference columns each including a plurality of midpoint generator cells, each midpoint generator cell including a first terminal coupled to an associated reference column and a second terminal, a first series circuit including a first magnetoresistive element with a resistance equal to reference-Rmax connected in series with a first magnetoresistive element with a resistance equal to reference-Rmin, the first series circuit connected in series between the first terminal and the second terminal, and a second series circuit including a second magnetoresistive element with a resistance equal to reference-Rmax connected in series with a second magnetoresistive element with a resistance equal to reference-Rmin, the second series circuit connected in series between the first terminal and the second terminal and in parallel with the first series circuit, whereby a total resistance between the first terminal and the second terminal is a midpoint between reference-Rmax and reference-Rmin;
• the plurality of reference columns being interspersed with the plurality of data columns in one of an architecture in which the reference columns are disposed one each between adjacent data blocks and an architecture in which the reference columns are embedded one each in each data block;
• and
• a differential read-out circuit coupled to the plurality of data columns and to the plurality of reference columns for differentially comparing a data voltage generated from a data cell in a selected data column to a reference voltage generated from a midpoint generator cell in a reference column adjacent the selected data column of the plurality of reference columns and providing a data output signal.